7 results about "Gunn diode" patented technology

Disclosed herein are clock synchronization circuits using Gunn diodes, and related integrated circuit (IC) structures, devices, and techniques. In one aspect, an IC structure includes a first transistor, a second transistor, a first Gunn diode coupled to the first transistor, a second Gunn diode coupled to the second transistor, and a third transistor coupled between the first Gunn diode and the second Gunn diode.

Gunn diodes are included in a device plane of an integrated circuit device, e.g., a diode array is in the same plane as a transistor array. A Gunn diode includes two highly n-doped regions surrounding a lower-doped n-type region. The highly-doped regions may be formed through epitaxial deposition. A Gunn diode may be arranged as a vertical diode, with two contacts stacked vertically over and under the diode, or as a horizontal diode, with two contacts at opposite horizontal ends of the diode. The Gunn diodes may be formed around a fin, e.g., with a front-side contact over the fin and a back-side contact under the fin.

Gunn diodes are formed using a set of layered semiconductor materials, with one or more n-doped upper layers and contacts over the uppermost semiconductor layer. A diode may include alternating layers of indium, gallium, and arsenic (e.g., InGaAs) and indium, aluminum, and arsenic (e.g., InAlAs), where an uppermost layer of the stack includes two regions of highly-doped InGaAs, and a layer of InAlAs is directly below the two regions of highly-doped InGaAs. The InAlAs layer forms the active region and is n-doped to a lower dopant concentration than the two InGaAs regions. Further alternating layers of InGaAs and InAlAs may be below the active region. A gate may be included between the two contacts and over the active region; the gate may apply a bias voltage to the active region. The Gunn diodes may advantageously be used in low-temperature environments, such as cooled IC devices.

Disclosed herein are memory cells using Gunn diodes, and related integrated circuit (IC) structures, devices, and techniques. In one aspect, a memory cell includes a first transistor, a second transistor, a first Gunn diode coupled to the first transistor, a second Gunn diode coupled to the second transistor, and a capacitor coupled between the first Gunn diode and the second Gunn diode.

The invention provides a Gunn diode with a Schottky-ohm mixed anode and a preparation method of the Gunn diode. The Gunn diode comprises a substrate, a buffer layer, a channel layer and a barrier layer which are sequentially arranged from bottom to top. An anode and a cathode are respectively arranged on two sides of the top end of the buffer layer; a Schottky anode is arranged at the top end of one side, close to the anode, of the barrier layer; the barrier layer is provided with a plurality of nanoscale grooves with gradually changing sizes and intervals. A Schottky contact and ohmic contact mixed structure is adopted, when metal with a high work function makes contact with a semiconductor, due to the difference between the work functions of the metal and the semiconductor, a Schottky junction is formed at an interface, and a Schottky barrier with a certain height is formed; when the domain moves to the vicinity of the anode, the Schottky junction bears part of the electric field, so that the field intensity distribution near the anode is more uniform, the peak intensity of the electric field is reduced, and the breakdown voltage of the device is improved.

A negative differential resistance (NDR) device, such as Gunn diode or a tunnel diode, is included in an integrated circuit device to regulate voltage delivered to circuitry on the device, such as a logic circuit or memory circuit. The NDR device may be biased at a knee voltage to provide a stable supply voltage to the IC device. The NDR device may be implemented in a metallization layer of the integrated circuit device.