32results about How to "Increase the breakdown voltage value" patented technology

An electromagnetic relay includes: a casing formed with an opening; a relay core member adapted for generating an electromagnetic field and inserted into the casing through the opening; an actuating set that is inserted into the relay core member, that is exposed from the casing, and that can be driven by a magnetic attraction force attributed to the electromagnetic field; a terminal set disposed on the casing and adapted to be actuated by the actuating set to thereby act as a switch mechanism; and a housing accommodating the casing, the relay core member, the actuating set and the terminal set.

The invention discloses a FinFET parasitic lateral double-diffused semiconductor device which comprises a semiconductor substrate, fin structures positioned on the semiconductor substrate, first well regions and second well regions arranged in parallel in the fin structures, source regions positioned in the second well region, shallow trench isolation structures and a drain region all positioned in the first well region, and gate electrodes spanning across the fin structures, wherein the doping types of the first well region and the second well region are different; each shallow trench isolation structure is positioned between the source region and the drain region; each gate electrode partially covers the first well region, the second well region and the shallow trench isolation structure; each fin structure has two separated branch fin structures on one side of the drain region, so as to accelerate the diffusion of ions. The semiconductor device provided by the invention improves the breakdown voltage on the side surfaces of the source regions of an LDMOS device for producing FinFet.

The invention relates to a breakdown resistant type LED lamp panel. The breakdown resistant type LED lamp panel comprises an LED aluminium base plate, wherein the LED aluminium base plate comprises analuminium plate layer and a circuit layer; and a breakdown resistant type insulating layer is arranged between the aluminium plate layer and the circuit layer. An epoxy resin adhesive is prepared ina sealed stirring kettle, ozone is introduced into the stirring kettle to prepare a first glue solution, the first glue solution is filtered by a magnetic filter to obtain a second glue solution, thesecond glue solution is coated on a rough surface of a copper foil to prepare a glued copper foil, the back surface of the glued copper foil is superposed with the aluminium plate, the superposed glued copper foil and aluminium plate are put into a vacuum press for being subjected to vacuum hot-pressing to obtain an aluminium based copper-clad plate; and the aluminium based copper-clad plate is processed according to a PCB process to obtain the breakdown resistant type LED lamp panel. The breakdown resistant type LED lamp panel is good in heat dissipation, has a breakdown voltage value which is increased to 70%, and has excellent breakdown resistance.

The invention discloses a production process of a double-imine copper lapped flat wire. The production process of the double-imine copper lapped flat wire comprises the following steps: (1) constant tension paying-off; (2) straightening and cleaning; (3) coating anti-oxidation material; (4) lapping double layers of polyimide films; (5) lapping glass fibers; (6) impregnating varnish; (7) baking in an oven; (8) coating an adhesive layer; and (9) cooling through cold air, online detection of voltage, metering and constant tension paying-off. The production process of the double-imine copper lapped flat wire is simple, an insulator outside the double-imine copper lapped flat wire comprises double layers of the polyimide films, an insulation layer mixed with the glass fibers and the impregnating varnish and an acetal adhesive layer from inside to outside, and is good in sealing performance. The double-imine copper lapped flat wire is good in insulation performance, high in puncture voltage value which reaches more than 9000 V, and good in heat resistance, the quality problems such as crack and fiber-falling are not easy to occur, the phenomenon of puncturing among turns does not occur in the winding process of a coil, and the mechanical damage is small.

The invention relates to a remote high-voltage pulse nanosecond switch applying insulating oil. The remote high-voltage pulse nanosecond switch comprises an organic glass shell, an electrode disk, a cathode, an anode, a triggering electrode, an electromagnet, a refined rapeseed oil serving as an insulating medium and a remote triggering and controlling system. The cathode, the anode and the electrode disk are tightly fixed together through bolts; the head of an electromagnet shell is provided with a thread and is connected with the organic glass shell of the switch; the tail end of an electromagnet core is connected with the triggering electrode through an organic glass rod; and the remote triggering and controlling system consists of a wireless remote controller, a receiving antenna, a high-frequency receiving module packaged in a metallic shield shell, a decoding integrated circuit (IC), a driving circuit, a relay and a storage battery. According to the remote high-voltage pulse nanosecond switch, radio signals emitted from the controller are received by the antenna, transmitted to the high-frequency receiving module and decoded by the decoding IC, the relay is driven by the driving circuit to energize the electromagnet and push the triggering electrode to move towards a main electrode, so that quick high voltage discharging is safely, reliably and conveniently realized, anda pulse wave form of which the rising edge is a nanosecond level is formed.

A manufacturing method of a high-voltage element, which firstly provides a substrate, wherein a gate structure of a high-voltage element has been formed on the substrate. Then, after the first thermal process is performed, a first doped region is formed in the substrate on both sides of the gate structure of the high voltage element. Afterwards, a spacer is formed on the side of the gate structure of the high voltage device. And an oxide layer is formed on the gate structure of the high voltage element and on the surface of the first doped region. Then, after performing a second thermal process, a second doped region is formed in the substrate on both sides of the spacer.

The embodiment of the invention discloses a preparation method of a high-dielectric polymer composite film. The preparation method is characterized by comprising the following steps of: sufficiently mixing a main material A and a certain quantity of first solvent to obtain a first slurry; mixing an organic dielectric material B with high dielectric constant and low loss and a certain quantity of second solvent, and dispersing the mixture to obtain a second slurry; sufficiently mixing the first slurry and the second slurry to obtain a third slurry; standing and curing the third slurry in a vacuum container to obtain a uniformly-mixed gel-state high-dielectric organic composite; and adding the gel-state high-dielectric organic composite into an extruding machine for heating and extruding, quenching a molten film through a cooling roller after the molten film is extruded, stretching the extruded cooled film in two ways through a film stretch forming machine, and finally, carrying out heat setting at the temperature of 150 DEG C to obtain the high-dielectric polymer composite film. The film has a high dielectric constant value, a high breakdown voltage value and a low dielectric loss value.

The invention discloses a withstand voltage bipolar transistor and manufacturing method thereof, and mainly solves the problem that an existing bipolar transistor is low in resistance and has a low withstand voltage value in an EMP environment. The withstand voltage bipolar transistor includes a substrate (1), a heavily-doped collector region (2), an epitaxial layer (3), a base region (4), an emitter region (5), a SiO2 layer (6), a SiO2 trench and a through hole. The heavily-doped collector region is cylindric, is located in the epitaxial layer, and divides the epitaxial layer into two parts,i.e., an in-cylinder epitaxial layer and outside-cylinder epitaxial layer; the in-cylinder epitaxial layer includes the cylindrical base region and the SiO2 trench which has the same junction depth asthe emitter region; and the base region includes the emitter region which in a circular ring shape. The method provided by the invention effectively reduces a current crowding effect on an emitter junction, thereby improving a withstand voltage characteristic of a collector junction; and solves the problem in the prior art that the overall withstand voltage characteristic of the transistor cannotbe improved only by protection of a specific input and output end, and achieves the purpose of improving transistor reliability on the whole.

The invention provides a coating for a Fe-based amorphous magnetically soft alloy strip, and a preparation method thereof. The coating has favorable working performance, and the advantages of small environmental pollution and low cost. The preparation method has a simple process and low production cost, and is suitable for industrial production. The coating for the alloy strip comprises the following components in percentage by weight: 20-30 percent of ethanol, 5-7 percent of dioctyl phthalate, 1-3 percent of n-butyl methacrylate, 25-30 percent of aluminium oxide / nano-zinc oxide composite material, 5-8 percent of gallic acid propyl ester, and the balance of polyurethane.

A grooved MOS (metal oxide semiconductor) forming method includes the steps: providing a semiconductor substrate; forming a groove in the semiconductor substrate; using the thermal oxidation process to form first gate dielectric layers at the bottom and on the side walls of the groove; using the high-temperature oxidation and deposition process to form second gate dielectric layers on the surfaces of the first gate dielectric layers; and filling a polycrystalline silicon layer in the groove. By the grooved MOS forming method, the problems of poor electric performance and low technical yield of grooved MOSs are solved.

The invention involves the method that the electricity measures appearance to adjust zero machines and exaltation electricity to measure gauge to bear air to broke through an electric voltage value, adjusting zero machines to include partiality stalk and a dish noodles among them, lacking of impartiality stalk to pass to connect piece with a circle dish noodles to make to lack of impartiality a conjunction. Because the invention adjusts zero machines to establish a dish noodles, and clip to establish in the organic glass cover and outer shell of, and establish one to open a head of having the cave slot to nail in the middle of outer shell surface at circle the center of the dish noodles, user as long as use screw knife expediently 360 degree to revolve and should adjust zero machines, lack of impartiality stalk to arouse a direction piece or so swing, arouse to point a needle swing thus, attain to point needle to adjust zero of purpose. Bears air to broke through an electric voltage value for the sake of the exaltation moreover with satisfy new safety standard (request gauge generally at least bear to press 5500 volts above), direction piece and of outer shell which needs enlargement to take to give or get an electric shock a body climb electricity distance, also namely enlargement circle the diameter of the dish noodles, can raise to bear air to broke through an electric voltage value to match various the most strict safety standard.

The invention discloses a super-junction device. A charge flow region comprises a plurality of super-junction structures formed by alternative arrangement of N-type columns and P-type columns in the transverse direction, each N-type column and the P-type column adjacent to the N-type column form a super-junction unit, a super-junction device unit is formed at the top of each super-junction unit, each super-junction device unit comprises a P-type back gate, the P-type back gate is located at the top of the corresponding P-type column, an interval region is reserved between the P-type back gate of at least one super-junction device unit and the P-type column, and the interval region separates the P-type back gate and the P-type column through N-type doping. The invention also discloses a manufacturing method of the super-junction device. According to the super-junction device and the manufacturing method thereof, the pinch-off voltage can be increased, the reduction trend of the depletion capacitance of the super-junction unit with the reverse bias voltage is improved, the capacitance in a high voltage is increased, the drastic change of the voltage in a switch is reduced, overshoot is reduced, and the electromagnetic interference performance of the circuit and the system is improved.

The invention relates to a new technology of an integrated device of the power electronic technology, in particular to a heterojunction device with an integrated diode. The present invention mainly uses a heterojunction diode with surface clamping above the drift region of the heterojunction transistor to realize the function of a reverse fast recovery diode, which has high current carrying capacity, high process compatibility, and high dynamic characteristics. The beneficial effect of the invention is that, by introducing a polarized heterojunction diode above the AlGaN / GaN HFET barrier layer, the reverse conduction diode is integrated above the drift region. The invention is compatible with the conventional process and the epitaxial process of the heterojunction barrier layer, and can increase the 2DEG concentration at the heterojunction interface through the distributed epitaxy method, and can further improve the overall performance of the device.