22 results about "Silicon nanostructures" patented technology

A device includes silicon nanostructures above in an n-type region, and silicon germanium nanostructures in a p-type region, wherein at least one of the silicon germanium nanostructures includes a silicon core region having a first concentration of germanium of about 20% or less, a silicon germanium region having a first interface between the silicon core region and the silicon germanium region, and a second silicon germanium region having a second interface between the silicon germanium region and the second silicon germanium region, the second silicon germanium region having a second concentration of germanium up to about 40%. A concentration gradient of germanium increases from the first concentration of germanium to the second concentration of germanium. A high-k dielectric layer surrounds at least one of the silicon nanostructures and at least one of the silicon germanium nanostructures.

The invention discloses a neural microelectrode based on a silicon nanostructure and a preparation method of the neural microelectrode. The neural microelectrode comprises a silicon substrate with the silicon nanostructure, and a first insulating layer, a conductive layer and a second insulating layer which are sequentially stacked on the silicon substrate, wherein the silicon nanostructure is a silicon nanocolumn structure, and the second insulating layer partially covers the conductive layer, so that a stimulation site, a recording site and a welding site of the conductive layer are exposed. According to the invention, the silicon substrate with the silicon nanostructure is used as a substrate material of the neural microelectrode, the silicon nanostructure is a high-density three-dimensional nanostructure formed by the silicon nanorod array, the diameter and height of the silicon nanorod can be flexibly adjusted, and the silicon nanorod has a relatively large specific surface area, so that the overall effective surface area of the neural microelectrode is increased; furthermore, the impedance of the microelectrode is reduced and the electrochemical performance of the microelectrode is improved.

The application discloses a kind of efficient silicon-based water-voltage devices and preparation method thereof, the silicon-based water-voltage device is composed of positive electrode, hole selective transport layer, silicon nanostructure, silicon substrate and negative electrode from top to bottom, the top end part of the silicon nanostructure is embedded in the hole selective transport layer.This application introduces hole selective transport layer in the interface of silicon nanostructure / positive electrode, uses the internal electric field formed by high work function hole selective transport layer in interface to prevent the migration of electron to positive electrode, realizes the selective transport of hole, reduces interface recombination loss to improve charge separation and collection efficiency;At the same time, the hole selective transport layer introduced realizes the transition of silicon nanostructure and positive electrode from point contact to surface contact, reduces the contact resistance of positive electrode interface, further promotes the efficient transport of hole at interface, thereby increases the collection efficiency of electrode to hole, under the synergistic effect of the above, effectively improve the electrical properties of silicon-based water-voltage device.

The application provides a surface treatment method for enhancing the adhesion of a gold coating on a quartz surface, comprising the following steps: (1) depositing catalytic metal particles on a clean quartz wafer; (2) removing the oxide layer on the surface of the catalytic metal particles on the quartz wafer obtained in step (1); (3) growing silicon nanostructures on the surface of the quartz wafer obtained in step (2) using silane gas; (4) high-temperature oxidation of the quartz wafer obtained in step (3) to change the silicon nanostructures into silicon oxide; (5) coating the quartz wafer obtained in step (4) with organic gold paste; and (6) heat treatment of the quartz wafer obtained in step (5) to decompose the organic gold on the surface and form a gold coating. The method can effectively control the morphology of the nanostructures, and the grown nanostructures can form a large number of mechanical bite action points, thereby forming a mechanical interlocking structure with the gold coating and effectively enhancing the adhesion of the gold coating on the quartz surface.

This invention discloses a continuous silicon nanowire anode material based on ALD seed layer-induced mesoporous confinement and its preparation method. The material comprises a mesoporous carbon framework with interconnected pore structures, and a one-dimensional silicon nanostructure located within the pores and extending continuously along the axial direction. The one-dimensional silicon nanostructure is connected to the inner wall of the mesoporous carbon through an interface modification layer, forming a continuous electron / ion transport pathway. The interface modification layer is formed by in-situ transformation of a metal oxide seed layer deposited on the inner wall of the pores under a silicon source gas and a reducing atmosphere, and its composition includes elemental metals, metal-silicon alloy phases, or metal silicides. Utilizing the spatial confinement effect of the mesoporous carbon, the radial expansion of the silicon nanostructure is restricted within the pores, reducing mechanical compression on the solid electrolyte; simultaneously, during the delithiation shrinkage process, the axial connectivity of the silicon nanostructure is maintained, alleviating solid-solid interface contact degradation, thereby improving the cycle stability and rate performance of the all-solid-state battery.

The present invention discloses a method for preparing silicon nanostructures using an alternating electric field combined with ultrasound. Two pairs of ultrasonic generators form a standing wave field within a reactor, causing charged metal particles to stagnate at various standing wave nodes within the standing wave field. Alternating current is passed through two graphite electrodes to generate an alternating electric field within the reactor, causing the charged metal particles to drive acid in a corrosive solution to etch a silicon wafer along the direction of the alternating electric field force. The positions of the standing wave nodes within the standing wave field are altered by varying the frequency and amplitude of the ultrasonic wave, thereby changing the locations where the charged metal particles catalyze the etching reaction. The depth of the etching of the silicon wafer surface microstructure is altered by varying the frequency and amplitude of the alternating current. The inclination of the silicon wafer surface microstructure is altered by varying the direction of the alternating electric field force. By adjusting the frequency and amplitude of the ultrasonic wave and the alternating current, the present invention can achieve etching of the silicon wafer surface according to a preset pattern, thereby improving the etching efficiency and accuracy of the silicon wafer.

A method for fabricating a maskless dendritic silicon nanostructure array, in which a copper layer is deposited on a surface of a silicon substrate, and passivated to form an insulating passivation film; a first laser induction is performed using a first laser beam to remove the insulating passivation film from a designated region and form a primary needle-shaped protrusion structure; a second laser induction is performed on the primary needle-shaped protrusion structure using a second laser beam to form a secondary dome-shaped protrusion structure, thereby forming a dual-level needle-shaped seed layer; the dual-level needle-shaped seed layer is subjected to parameter-controlled electrodeposition to grow dendritic microstructures, so as to obtain a silicon wafer containing the maskless dendritic silicon nanostructure array. A silicon wafer with a silicon nanostructure array fabricated by such process is also provided.

This invention relates to catalyst-induced chemical etching. [Solution] A method for fabricating silicon nanostructures. An etching uniformity improvement layer is deposited on a substrate. A catalyst (e.g., a thin film of Ti / Au) is deposited on the substrate or etching uniformity improvement layer, and the catalyst comes into contact with a portion of the substrate or etching uniformity layer. The catalyst and the substrate or etching uniformity improvement layer are exposed to an etchant, and the catalyst causes etching of the substrate, thereby creating an etched nanostructure.

The present invention discloses a method for processing a maskless dendritic silicon nanostructure array and a silicon wafer prepared therefrom. The processing method comprises pretreatment, a first laser induction step, a second laser induction step, and electrodeposition. The processing method employs two stages of laser induction and a single electrodeposition step. Laser induction eliminates the need for a mask, thus preventing damage and contamination to the silicon nanostructure array during mask removal. Furthermore, biomimetic patterning of the silicon wafer's surface microstructure is achieved. The silicon wafer processed using this method, due to the microchannels formed within the maskless dendritic silicon nanostructure array, enables efficient capillary mass transfer along the microchannel walls. Furthermore, the dendritic silicon nanostructures have a large specific surface area, enabling efficient evaporative heat transfer perpendicular to the microchannels, thereby improving the heat transfer limit.

The invention discloses a non-Faraday junction flexible sensor and a preparation method thereof. The non-Faraday junction flexible sensor comprises an ultra-thin silicon functional layer, a positive electrode and a negative electrode which are respectively arranged on two sides of the ultra-thin silicon functional layer, and protective layers arranged on the peripheries of two sides of the ultra-thin silicon functional layer, the ultrathin silicon functional layer comprises a silicon substrate and a silicon nanopillar array arranged on one side of the silicon substrate; and the positive electrode and the negative electrode are inert metal electrodes. According to the invention, the protective layers are carried on the edges of the two sides of the ultrathin silicon nanostructure, so that the problems of low yield, limited service life and poor device flexibility caused by the existence of surface cracks of the ultrathin silicon nanostructure are solved, and the possibility is provided for preparing a silicon electronic device with lower thickness and better flexibility; inert metal electrodes are arranged on the two sides of the ultra-thin silicon nanostructure to form a non-Faraday junction, and lower ground noise and higher sensitivity are achieved when respiration signals and bio-electricity signals are measured.

The invention discloses a processing method of a maskless tree-shaped silicon nanostructure array and a silicon wafer prepared by the maskless tree-shaped silicon nanostructure array, the processing method comprises pretreatment, first laser induction, second laser induction and electro-deposition, and the processing method carries out two-stage laser induction and one-time electro-deposition; due to laser induction, a mask is not needed, and damage and pollution to the silicon nanostructure array in the mask removal process are avoided; in addition, bionic patterning of the microstructure on the surface of the silicon wafer can be achieved. According to the silicon wafer processed by the method, the micro-channels are formed in the maskless tree-shaped silicon nanostructure array, so that efficient capillary mass transfer can be carried out along the wall surfaces of the micro-channels; moreover, the tree-shaped silicon nanostructure has a large specific surface area, efficient evaporation heat transfer can be carried out in the vertical direction of the microchannel, and the heat transfer limit can be improved.

Described herein are antireflective materials and methods of making antireflective materials. The material can include a plurality of hierarchical nanostructures on a base substrate and a total specular reflection of less than 3% at a wavelength of about 400nm to about 1100 nm. The material can have an etched polyimide layer disposed on the superior surface of the hierarchical nanostructures. The materials can also have superhydrophobic characteristics.

This disclosure relates to methods for modulating activity of a cell capable of being activated by light and treating diseases with such methods. The disclosure also provides systems suitable for use in such methods, particularly systems having silicon nanostructures.

The invention relates to the technical field of metasurface sensing, in particular to a hollow near-infrared metasurface sensor and a detection method thereof.The hollow near-infrared metasurface sensor comprises a quartz substrate and hollow silicon nanostructures arranged on the quartz substrate in a periodic array mode; the hollow silicon nanostructure is provided with a rectangular hollow area, and the center of the rectangular hollow area does not coincide with the center of the hollow silicon nanostructure, so that the hollow silicon nanostructure forms an asymmetric structure to excite Fano resonance for sensing in a near-infrared band. The invention has the advantages that the limitation of the traditional single-parameter sensor is broken through, the double-parameter sensing of the refractive index and the temperature is realized, the application potential in the fields of polarized light switches and the like is shown, and the practical application scene is greatly expanded.

The invention relates to a preparation method and application of a composite silicon nanostructure catalyst based on silicon sludge, and belongs to the technical field of optical / photoelectric catalysts. The method comprises the following steps: sequentially carrying out acid leaching impurity removal and high-temperature purification treatment on the photovoltaic cutting silicon waste (silicon sludge) to obtain high-purity silicon powder; a porous nanostructure is constructed on the surface of silicon powder and metal oxide (such as Cu2O) nanoparticles are loaded through a metal-assisted chemical etching method for accurately controlling metal ion deposition and etching processes; a nickel sulfide (NiS) cocatalyst is selectively loaded on the composite silicon nanostructure by adopting a hydrothermal method to form the catalyst with a heterojunction structure. According to the invention, the silicon sludge is co-loaded with cuprous oxide and nickel sulfide for the first time, and the prepared composite silicon-based photocatalytic material has broad spectrum absorption, efficient charge separation capacity and high hydrogen evolution performance, and shows high hydrogen evolution amount of 51.4 mmol g <-1 >, average hydrogen evolution rate of 8.57 mmol g <-1 > h <-1 > in 6 hours and apparent quantum efficiency of 31% in visible light induced photocatalytic water decomposition hydrogen evolution reaction.

To provide nanostructured materials for use in rechargeable energy source devices such as lithium batteries, particularly rechargeable secondary lithium batteries, or lithium-ion batteries (LIBs).SOLUTION: The present invention includes materials, components, and devices, including nanostructured materials for use as battery active materials, and lithium ion battery (LIB) electrodes comprising such nanostructured materials, as well as manufacturing methods related thereto. Exemplary nanostructured materials include silicon-based nanostructures such as silicon nanowires and coated silicon nanowires, nanostructures disposed on substrates comprising active materials or current collectors such as silicon nanowires disposed on graphite particles or copper electrode plates, and LIB anode composites comprising high-capacity active material nanostructures formed on a porous copper and / or graphite powder substrate.SELECTED DRAWING: Figure 44

The application discloses an on-chip integrated plasmonic photodetector and a preparation method and application thereof, and belongs to the technical field of optical elements.The photodetector comprises a semiconductor structure, an electrode and a plasmonic waveguide; the semiconductor structure comprises silicon, silicon dioxide and a semiconductor photoelectric material from bottom to top, is obtained by etching part of the top silicon of silicon-on-insulator or is obtained by depositing or transferring the required semiconductor photoelectric material after etching the top silicon of silicon-on-insulator completely; the electrode is arranged at two ends of the semiconductor photoelectric material and is in contact with the semiconductor photoelectric material; and the plasmonic waveguide is arranged at the side of the semiconductor photoelectric material, and a gap exists between the end of the plasmonic waveguide and the semiconductor photoelectric material.The application realizes efficient near-field coupling between the plasmonic waveguide and the silicon nanostructure by optimizing the structure parameters, and finally realizes on-chip integrated direct detection of the electrical signal of the plasmon, and has good controllability in processing and preparation.

To provide a composite of nanocarbons and a silicon nanostructure, the silicon nanostructure including a structure combining a porous structure and silicon nanowires and a structure in which the silicon nanowires are bonded on a porous layer, the composite capable of inhibiting expansion and preventing electrical loss, as well as being a powder and having a high capacity.SOLUTION: A composite consists of a silicon nanostructure 1 and nanocarbons. The silicon nanostructure 1 includes a silicon porous layer 2 having a plurality of first pores 4 and one or more porous silicon nanowires 3 having a plurality of second pores 6 continuously coupled to the silicon porous layer 2.SELECTED DRAWING: Figure 12

The present invention relates to a Si nanostructure standard material of 5 nm or less, and a manufacturing method therefor, and to a microscope evaluation method using the standard material. Specifically, the present invention provides a standard material having a reduced critical dimension through two etching processes, and thus can improve the evaluation precision of a microscope.

The invention discloses a silicon nanostructure preparation method and system based on metal-assisted chemical etching, and the method achieves the controllable preparation of an inclined nanobelt and a vertical nanowire on a low-doped p-type (100) silicon substrate at room temperature through the regulation and control of the volume ratio R of hydrofluoric acid to a hydrogen peroxide solution. The method comprises the following specific steps: pretreating a silicon substrate and preparing a micron-sized metal mask; preparing HF-HO etching solutions with different volume ratios; carrying out metal auxiliary chemical etching; the product is characterized through SEM, TEM and EDS. The invention discloses a correlation mechanism of the etching liquid components and the morphology of the silicon nanostructure, the accurate regulation and control of the inclination angle in the range of 8.6-78 degrees can be realized by adjusting the volume ratio R, the limitation that the traditional MACE technology needs high temperature to prepare the inclined silicon structure is solved, the cost is low, the operation is simple and convenient, the controllability of the morphology of the product is strong, and the method is suitable for industrial production. The method is suitable for preparing silicon nanostructures in the fields of photovoltaic, thermoelectric and optoelectronic devices and the like.

This invention relates to the field of optoelectronic materials and photodetectors, providing a plasmon-enhanced silicon-based near-infrared photodetector material, its preparation method, and its applications. The invention constructs a silicon nanostructure array on a silicon substrate and deposits a metal layer on the surface of the silicon nanostructure array. The metal layer is formed by dispersed metal nanoparticles or metal nanoclusters. The metal layer and the silicon nanostructure array form a Schottky barrier, achieving interfacial barrier modulation and directional separation of charge carriers, significantly suppressing recombination and reducing dark current noise. Simultaneously, the localized surface plasmons generated by the metal nanoparticles or metal nanoclusters significantly enhance near-field light intensity and promote the effective separation and injection of hot electrons or photogenerated charge carriers, thereby improving the interfacial photoelectric conversion efficiency. The efficient light-trapping structure of the silicon nanostructure array further enhances its broad-spectrum absorption capability. The photodetector material provided by this invention exhibits high responsivity, low noise, and excellent photoelectric conversion performance.

The present application belongs to the field of micro-nanostructure technology, and in particular relates to an etching processing method and device for a tortuous silicon nanostructure; the etching processing device for a tortuous silicon nanostructure provided by the present application utilizes a control system to control an inlet peristaltic pump to input the etching solution in a component addition container into the etching container to etch a silicon substrate, and by controlling the pump speeds of the inlet peristaltic pump and the outlet peristaltic pump, stepless adjustment of different etching solutions is achieved, and the component concentration adjustment accuracy of the etching solution is high, thereby improving the etching accuracy of the tortuous silicon nanostructure, and can solve the technical problem of low etching accuracy of the tortuous silicon nanostructure in the prior art.