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87results about How to "Efficient etching" patented technology

Optical fiber for transmitting ultraviolet ray, optical fiber probe, and method of manufacturing the optical fiber probe

It is an object of the present invention to provide an optical fiber for transmitting ultraviolet ray which has an improve transmittance and is prevented from deterioration by ultraviolet ray with which it is irradiated. It is another object of the present invention to provide an optical fiber probe which can propagate vacuum ultraviolet ray and deep ultraviolet ray at a high transmittance, is deteriorated only to a limited extent when irradiated with ultraviolet ray and can be etched to have a desired shape of the sharpened section at the fiber end.The present invention provides the optical fiber for transmitting ultraviolet ray which has a core 5 of silica glass containing a given content of fluorine and a clad 6a of silica glass containing a given content of fluorine or boron, a clad 6b of a resin which transmits ultraviolet ray or a clad 6c having air holes H. The clad may be coated with a protective layer and further with a covered layer for protection. In particular, the core, clad and protective layer have a high transmittance for ultraviolet ray and resistance to ultraviolet ray with which they are irradiated, when treated with hydrogen.An optical fiber probe 1 has an optical fiber 2 provided with a sharpened section 3 at the end, which is sharpened with an etchant solution, the sharpened section 3 being coated with a light-shielding metallic film 4.
Owner:JAPAN SCI & TECH CORP

Synchronous composite processing method of micro-hole electric sparks and different electrolytic areas and special tool of synchronous composite processing method

ActiveCN103480926AAchieving electrochemical finishingEfficient perforationElectrolysisEngineering
The invention provides a synchronous composite processing method of micro-hole electric sparks and different electrolytic areas and a special tool of the synchronous composite processing method. The synchronous composite processing method includes that a tube electrode is switched to impulse voltage, and a neutral salt solution with ultra-low concentration flows into a processing area via the inner side of the tube electrode at a high speed, and then flows out of the processing area along a gap between the tube electrode and a workpiece; an end face of the tube electrode is subjected to high-speed punch processing with axial feeding of electric sparks under the ultra-low concentration of the neutral salt solution, and a hole wall processed by the electric sparks is subjected to radical electrochemical finishing and machining under the action of low-pressure voltage. By the synchronous composite processing method, processing precision is guaranteed, punching efficiency is improved, and processing requirements on various kinds of holes of an aircraft engine are met. Different from conventional electric spark processing and electrolytic processing, the synchronous composite processing method adopts the neutral salt solution with the ultra-low concentration, so that processing efficiency in electrochemical dissolution can be greatly improved and corrosion degree of equipment can be decreased.
Owner:NANJING UNIV OF AERONAUTICS & ASTRONAUTICS

Method for producing group III nitride semiconductor and template substrate

The present invention provides a method for producing a Group III nitride semiconductor. The method includes forming a groove in a surface of a growth substrate through etching; forming a buffer film on the groove-formed surface of the growth substrate through sputtering; heating, in an atmosphere containing hydrogen and ammonia, the substrate to a temperature at which a Group III nitride semiconductor of interest is grown; and epitaxially growing the Group III nitride semiconductor on side surfaces of the groove at the growth temperature. The thickness of the buffer film or the growth temperature is regulated so that the Group III nitride semiconductor is grown primarily on the side surfaces of the groove in a direction parallel to the main surface of the growth substrate. The thickness of the buffer film is regulated to be smaller than that of a buffer film which is employed for epitaxially growing the Group III nitride semiconductor on a planar growth substrate uniformly in a direction perpendicular to the growth substrate. The growth temperature is regulated to be lower than a temperature at which the Group III nitride semiconductor is epitaxially grown on a planar growth substrate uniformly in a direction perpendicular to the growth substrate. The growth temperature is preferably 1,020 to 1,100° C. The buffer film employed is an AlN film having a thickness of 150 Å or less.
Owner:TOYODA GOSEI CO LTD

Process for epitaxial growth of silicon in three-dimensional (3D) NAND flash structure

The invention provides a process for epitaxial growth of silicon in a three-dimensional (3D) NAND flash structure. The method comprises the steps of depositing a substrate lamination structure; etching the substrate lamination structure to form a channel and a silicon groove in a substrate surface; cleaning the channel and the silicon groove; performing high-temperature annealing; forming epitaxial growth of the silicon, and cleaning the silicon in advance; and performing epitaxial growth of the silicon. By high-temperature annealing, the surface of the silicon groove damaged by etching is oxidized, so that resided polymer in the silicon groove in the bottom of the channel is eliminated, meanwhile, a certain oxidization repair effect also can be generated on the surface, which is damaged,of the silicon subsequently and epitaxially grown, and interface damage and lattice defect are eliminated; the step of wet cleaning is added before high-temperature annealing, the subsequent and better effects of oxidization annealing and interface repair can be obtained; and by the process, the deep channel can be effectively etched, oxide residue is prevented, damage to an interface layer by etching is prevented, so that the epitaxial growth height uniformity of the silicon is improved, an epitaxial growth gap of the silicon is prevented, and the comprehensive performance of a 3D NAND flashis improved.
Owner:YANGTZE MEMORY TECH CO LTD

Organic light-emitting display apparatus and preparation method thereof

The invention relates to an organic light-emitting display apparatus and a preparation method thereof. The preparation method comprises the steps of providing a substrate; forming a positive electrodelayer on the substrate; forming an organic light-emitting layer on the positive electrode layer; forming a negative electrode layer on the organic light-emitting layer; removing a part of the negative electrode layer and a part of the organic light-emitting layer which are corresponding to an opening in the substrate through etching by adopting a plasma bombardment mode through the opening of a mask plate; providing a cover plate with an outer layer glass material and an inner layer glass material; enabling the substrate to be laminated with the cover plate, and performing sintering on the outer layer glass material and the inner layer glass material to form an outer layer packaging layer and an inner layer packaging layer, and enabling the substrate and the cover plate to be connected ina sealing manner; and performing hole punching on the substrate and the cover plate in the inner layer packaging layer to form the organic light-emitting display apparatus with holes. By virtue of the plasma bombardment mode, more efficient organic material etching can be realized, and higher production efficiency and higher etching precision are achieved; and in addition, scalding to a pixel region can be avoided, the etching cost can be lower and the production cost can be lowered effectively.
Owner:TRULY HUIZHOU SMART DISPLAY

Nano enzyme with nanometer cage core of hollow gold-platinum alloy and shell of porous silicon dioxide, preparation method and application thereof

The invention provides a nano enzyme with a nanometer cage core of a hollow gold-platinum alloy and a shell of a porous silicon dioxide, a preparation method and an application thereof, and belongs tothe field of nanometer materials. The preparation method comprises the following steps: etching a gold core platinum shell nanostructure through potassium hexachloroplatinate to obtain a nanocage ofhollow gold-platinum alloy; coating silicon dioxide on the surface of the nanocage through tetraethyl silicate; and obtaining the nano enzyme taking the nanometer cage, in a round rod shape, of the hollow gold-platinum alloy as a core, and a silicon dioxide shell as the periphery of the core. The length of the core is 80 to 100 nm, and the diameter is 20 to 25 nm. The shell is provided with a channel of 3 to 5 nm. The nano enzyme is negatively charged. The antigen can be bound by an attractive effect of positive and negative electric charges to form a nano enzyme label antigen complex, which is used for performing enzyme linked immunoassay. According to the nano enzyme with the nanometer cage core of the hollow gold-platinum alloy and the shell of the porous silicon dioxide, the preparation method and the application thereof, the cost of a reagent of the natural enzyme label antigen complex is reduced, the working environment of enzyme linked immunodetection is extended, the defects that the natural enzyme is easy to deactivate and denature, etc., are overcame, and the nano enzyme can be widely applied to various enzyme linked immunodetection.
Owner:ZAOZHUANG UNIV
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