1results about How to "Reduce thermal process" patented technology

The application discloses a high-density DreaMOS device and a manufacturing method thereof. The high-density DreaMOS device comprises a semiconductor structure layer, a gate oxide layer matched with the semiconductor structure layer and a gate electrode. The semiconductor structure layer comprises an epitaxial layer, a source region, a well region, a well region contact region, a drain region extension region and a drain region formed in the epitaxial layer. A channel doping region is further formed in the epitaxial layer. The channel doping region is distributed at least in a lower region and a side region of the gate electrode. The channel doping region is connected with the source region, the drain region extension region and the well region respectively. The on-resistance of the high-density DreaMOS device provided by the embodiment of the application is reduced by 85%, and the current density is 4.5 times of that of a conventional LDMOS device.