76results about How to "Integrated high" patented technology

The invention discloses a multi-hierarchy relationship information management system based on cloud computing. The multi-hierarchy relationship information management system based on the cloud computing comprises a cloud service platform and a client. The cloud service platform comprises a physical resource layer used for storing information data of all organization hierarchy units, a processing platform layer used for processing the information data on the physical resource layer, a displaying application layer used for displaying the information data and a management layer used for managing and maintaining the physical resource layer, the processing platform layer and the displaying application layer. According to the multi-hierarchy relationship information management system based on the cloud computing, a mode of one longitudinal layer and three transverse layers is provided and used for supporting the whole multi-hierarchy organization structure, and the whole system is made to meet requirements for 'one base, one platform, and one network' due to the fact that the multi-hierarchy relationship information management system based on the cloud computing is established. In addition, rich cloud computing abilities and a friendly user interface are provided, and the purpose that mass information is obtained from the interior of an organization, applied to the interior of the organization and analyzed by the interior of the organization is achieved. Therefore, safety performance and the information sharing rate of the system are improved, resources are utilized efficiently, and requirements that information is more integrated, supervision is more strict and decision-making is more convenient are met.

The invention provides an inner wall melt-embedded type multicore single mode polarization-maintaining fiber grating and a manufacture method. The inner wall melt-embedded type multicore single mode polarization-maintaining fiber grating comprises a multicore fiber, the center of the multicore fiber is an air hole, part of each fiber core of the multicore fiber is embedded in a cladding with the refractive index lower than that of the fiber core while the other part thereof is suspended in the air hole to form an inner wall melt-embedded type multicore single mode polarization-maintaining fiber core in an ellipsoid-like shape, and the fiber core is prepared into the inner wall melt-embedded type multicore single mode polarization-maintaining fiber grating by an ultraviolet light source through a phase position maskplate writing technology. Due to good polarization-maintenance performance of the inner wall melt-embedded type multicore single mode polarization-maintaining fiber designed by the invention, the manufactured multiple polarization-maintaining fiber gratings are integrated into one optical fiber, thus improving integration of optical devices in optical fibers and facilitating simultaneous measurement of multiple physical quantities.

The invention discloses a register designing method in an integrated circuit designing process. The register designing method comprises the steps of generating an XML (Xtensible Markup Language) file including register configuration information by an XML editor; according to the type of a register interface included in the register configuration information, obtaining an RTL (Register Transfer Level) template in an RTL template base; according to the obtained RTL template and the register configuration information, generating an RTL file header including the register interface information and the parameter declaration; traversing all the register configuration information included in the XML file to generate RTL information of all the registers; and obtaining an RTL designing file including the RTL file header and the RTL information. According to the register designing method of the invention, the IC (Integrated Circuit) designing defects are reduced, and the designing success rate is increased.

Provided is a lead wire framework based on DIP multiple substrates and a method of using the lead wire framework to manufacture a packaging part. The lead wire framework comprises a framework body with a plurality of rows of first framework unit sets and a plurality of rows of second framework unit sets, and the two kinds of framework unit sets are arranged at intervals. A framework unit is provided with three substrates, wherein two substrates are in connection with four inner pins of the framework unit through a dam bar, and are located between a third substrate and the dam bar; the third substrate is in connection with the frame of the framework body through a tie bar; the inner pin in the framework unit towards an adjacent framework unit and the inner pin of the adjacent framework unit towards the framework unit are interlaced. A wafer is thinned and sawed, and a chip is adhered to the lead wire framework according to requirements to obtain a packing part through processes including pressure welding, post curing, plastic package, etc. The lead wire framework is conductive to increasing product function integration, and improving product packaging yield, quality and reliability; in addition, the lead wire framework can be extended to multi-row matrix type packaging, and is not limited to a DIP packaging form.

The invention provides a rotary writing method of a multi-core fiber grating, which comprises the following steps of stripping one section of coating on a multi-core fiber; fixing the multi-core fiber on a fiber fixture after cleaning treatment; arranging the fiber fixture on a rotary optical device; tightly attaching the multi-core fiber to a mask; regulating the rotary optical device so that one fiber core aligns with a writing optical source; starting an excimer laser, and conducting exposure after the optical source becomes parallel light through collimating and beam expanding; connecting one end of the multi-core fiber to a broadband optical source, and connecting the other end to a spectrograph; monitoring grating formation through the spectrograph, and stopping exposure after achieving the required reflectivity; regulating the rotary optical device to a proper angle so that the next fiber core of the multi-core fiber rightly aligns with the writing source for writing fiber by fiber; and packaging. The invention has the advantages of simple implementation and easy control, and can improve the writing quality of the grating; a plurality of manufactured multi-core fiber gratings are integrated in one fiber, which improves the integration of optical devices in the fiber and can be used for simultaneously measuring a plurality of physical quantities and multi-dimension information.

The invention provides an intelligent helmet binocular display system for electric power inspection and a realization method thereof, which are used for assisting power grid power transformation, power distribution and power transmission inspection. According to the method, a binocular imaging optical subsystem and a sequential logical circuit based on an FPGA (Field Programmable Gate Array) are designed; an invented intelligent helmet binocular enhanced reality display system comprises image acquisition, data conversion, caching, storage, protocol conversion and an interface; intelligent helmet binocular imaging enhanced reality display for the electric power inspection is realized. The intelligent helmet binocular display system is high in hardware integration degree, good in system flexibility, low in power consumption and stable in display stability, and the reliability of the whole system is improved. According to an imaging system provided by the invention, the utilization rate of light source light in an imaging process can reach about one time of that of a single chip type imaging system. An image projected into eyes has more saturated and full colors, and a rainbow picture problem, which disturbs a single chip DLP imaging system, does not occur.

The invention provides a two-dimensional fiber bragg grating and a preparing method thereof. The two-dimensional fiber bragg grating comprises optical fibers which consist of one group of fiber cores and optical fiber coatings. The fiber cores are intensively arranged into a linear array multi-core optical fiber in one plane. The optical fibers form a one-dimensional grating in the direction vertical to the axial direction of the optical fiber. Each fiber core writes the fiber bragg grating array in the same position. The gratings are related, respectively have the grating effect in two directions, and form a two-dimensional fiber bragg grating. The distance between the gratings is small, and the two-dimensional bragg grating can be used for equidirectional and reserve multi-wavelength selectors. Multiple fiber bragg gratings are integrated into one optical fiber, thereby enhancing the integration of the optical devices in the optical fiber and enhancing the property of the integrated devices. The two-dimensional fiber bragg grating can be used for the optical fiber sensor to sense more information.

The invention discloses a nanowire memristor and a manufacture method thereof. The nanowire memristor comprises an upper electrode, a lower electrode, and a memory storage layer arranged between the upper electrode and the lower electrode. The manufacture method of the nanowire memristor comprises the following steps of: providing an insulation substrate; forming the lower electrode on the insulation substrate; synthesizing a nanowire on the lower electrode to be used as the memory storage layer; and forming the upper electrode on the nanowire memory storage layer. The memory storage layer comprises a single nanowire or nanowire array. The nanowire memristor disclosed by the invention is small in size, can realize more integration, and has a simple structure and is simple in preparation process.

The application provides a power control circuit of a power amplifier, composed of a current control loop and a voltage control loop, wherein the voltage control loop forms an LDO (Low Dropout Regulator) circuit, requiring no large LDO, or large PMOS pipe for power supply, reducing dimension and cost, and not influencing the power of a power amplifier; the current control loop does not need an accurate Sense sampling resistor, thereby facilitating integration of chips. The power control circuit combines the voltage control technology and the current control technology; before an output circuit starts working and the current control loop is stable, the voltage control loop controls the output power of a power amplifier; then the voltage control loop and the current control loop control the output power of the power amplifier together; and when the current control loop is stable, the current control loop controls the output power of the power amplifier, thereby controlling the output power of the power amplifier from the work beginning of output current to work end.

An AGV drive mechanism comprises a supporting member and a drive component arranged on the supporting member. The drive component comprises a first drive wheel and a second drive wheel which are rotatably installed on the supporting member and which are plateful motors. The drive mechanism further comprises a floating frame and an elastic member fixedly connected to the floating frame. The floating frame comprises a first fixing plate installed on the supporting member and a second fixing plate arranged corresponding to the first fixing plate, and two ends of the elastic member are fixedly connected to the first fixing plate and the second fixing plate respectively.

The invention puts forward an abstract integration design method of a complex electronic system, and aims to provide an open type system structure method which supports to insert new functions, is convenient for inserting an expandable module and exhibits high efficiency in integration, test and verification. The abstract integration design method is realized through the following technical scheme: in a complex electronic information system, through the interconnection of a hardware bus and / or software bus, constructing an open physical hardware platform and an open type software platform, and establishing an abstract set of three sub-layers including a practical physical platform set layer, a software logic component set layer and a system function application set layer; in a visual modeling environment, analyzing and decomposing the complex electronic system, and constructing a hardware model, a software model and a deployment configuration model described by a logic component meta-model; and finally, uniformly storing logic component operation bodies in a file server or independently storing the logic component operation bodies in the nonvolatile memory of each hardware node, and analyzing and operating a blueprint file by a target system to deploy the logic component on the hardware nodes of a preset function unit.

The invention discloses a preparation method of a large-area and uniform nanometer dipolymer array. The preparation method of the large-area and uniform nanometer dipolymer array comprises sequentially spin-coating a substrate sequentially with a peelable photoresist layer and a negative photoresist layer, performing patterning exposure, development and fixation on the negative photoresist layer to obtain a petal-like nano through hole array arranged in a hexagonal mode, etching out the peelable photoresist layer under through holes, performing deposition of materials by taking an obtained pattern as a template, removing photoresist to obtain the large-area and uniform hexagonal petal-like nanometer dipolymer array. The obtained large-area and uniform hexagonal petal-like nanometer dipolymer array achieves the properties of dipolymer units as well as the characteristics of periodic arrays, thereby having a broad application prospect. The preparation method of the large-area and uniformnanometer dipolymer array is simple in operation, good in morphology controllability, repeatable, capable of easily preparing large-area and uniform arrays and applicable to practical application.

The invention relates to a thick oil environment working device with a logo and a manufacturing method of the logo on the thick oil environment working device. The manufacturing method includes the step of recording a rectangular-ambulatory-plane shaped positioning icon and a long strip icon on the working device. Furthermore, the invention discloses a method and a device for identifying the logo. The method for identifying the logo includes the step: performing multi-information synchronization and identification on a code by using a two-dimensional searching and matching recognition algorithm, and realizing the digital management of the working device. Besides, the invention discloses an identity identification management system of an oil tube. According to the method for encoding and identifying the thick oil environment working device and the management system, the rectangular-ambulatory-plane shaped icon is convenient to position and identify, and also easy to record; the long strip icon is easy to record, clean and identify, and matched up with the principle of binary code; the recognition algorithm of the invention takes the two-dimensional searching and matching as the principle; by sampling a specific sampling point, the sampling frequency is reduced, the recognition scale is effectively improved and the integration of the encoding information is added; moreover, the recognition rate is greatly improved.

The invention belongs to the technical field of integrated circuits of a radio-frequency wireless receiver, and in particular relates to a radio-frequency front-end circuit with single-ended input differential output applied to an ultra-wideband system. The radio-frequency front-end circuit consists of a low noise amplifier (LNA) and an orthogonal mixer, wherein the LNA has a single-ended input differential output structure and consists of two stages so as to adapt to a larger input signal range required by the ultra-wideband system; the orthogonal mixer consists of an I path and a Q path, and the two paths share an input amplifying tube; the mixer adopts a current injection technique and a current injection tube is used as part of the input amplifying tube so as to improve the performance of the mixer; and the LNA and the mixer are connected with each other through a unit gain buffer so as to reduce the influence of large input capacitance of the mixer on the load of the LNA. The radio-frequency front-end circuit has the advantages of simple structure, variable gain, low power consumption, wide using band, small chip area, reduction in the use of an off-chip element, and contribution to realizing singlechip integration.

The invention relates to an on-chip bus test system based on the Tbus bus standard. The system includes a main control unit and a slave terminal device end which are communicated with each other through data flow; a device internetwork is arranged between the main control unit and the slave terminal device end; a signal group set of the main control unit includes a data output signal group Out, a data injection signal group Inject, a parameter control signal group Param, a state signal group Status and a control signal group Control; a signal group set of the slave terminal device end includes a data output signal group Out, a data injection signal group Inject, a parameter control signal group Param, a state signal group Status and a control signal group Control. All test peripheral units are connected with a test bus in a hung mode to form the test system, a unified and rapid operation method is used for operating each test peripheral unit, the integration of the test system is accelerated, test defects are reduced, and the testing efficiency is improved.

The invention discloses an optical detector and a producing method and an application thereof. A photo-thermal electric device includes a substrate, an active layer, and electrodes; wherein the active layer is positioned on the substrate; the number of the electrodes at least is two, and the electrodes are positioned on the active layer; the area of each electrode is smaller than that of the active layer, and the electrodes are not contacted each other. According to the invention, based on the principle that organic thermoelectric materials can absorb infrared light, the photo-thermal electric device can be produced by adoption of a type of organic thermoelectric material, and the photo-thermal electric device can effectively detect the infrared light at the room temperature; in addition, the photo-thermal electric device can achieve large area and high density integration, can generate power by utilizing sunlight, and has an important application value.

The invention provides a digital twinborn body construction method for precise monitoring of a sunlight greenhouse. The digital twinborn body construction method comprises the following three steps that 1, preparation is carried out, and early-stage information is collected and a digital twinborn sunlight greenhouse scheme is formulated; 2, a digital twinborn sunlight greenhouse is constructed, and the digital twinborn sunlight greenhouse comprises a digital process, a standardized process and an intelligent process; and 3, operation maintenance is carried out, and the constructed digital twinborn body is expanded, fed back and optimized. According to the digital twinborn body construction method for precise monitoring of the sunlight greenhouse, automatic real-time acquisition, display and modeling analysis of multi-environment element data can be realized, automatic linkage regulation and control according to an early warning rule are supported, and the effects of improving crop yield, reducing operation and management cost, improving disaster risk resistance, optimizing a management mode and enhancing greenhouse automatic management and control capability are achieved.

The invention discloses a dual-band / dual-polarization CTS antenna based on a 3D orthogonal shunt-feed network. The dual-band / dual-polarization CTS antenna comprises a first-stage feed network, a second-stage feed network and a radiator, the I-level feed network comprises two transmission channels, the transmission channels are used for converting point source signals into line source signals, and the two line source signals output by the two transmission channels are orthogonal; the second-stage feed network is used for converting two paths of orthogonal line source signals into two orthogonal 2D line source array signals, the radiator is used for radiating the two orthogonal 2D line source array signals to a free space, and the radiator comprises a low-loss dielectric layer for supporting and a first prismatic table in a rectangular array; the row gaps and the column gaps among the four adjacent first prismatic tables forming the rectangular shape form a cross-shaped radiation unit. A high-isolation two-stage orthogonal shunt-feed structure and a dual-band / dual-polarization common aperture radiator are adopted, excitation of two independent ports and two independent channels are achieved, dual-band electromagnetic signals are converted from a point source to a 2D line source array, the structure is compact, and the size is small.

The invention discloses an embedded software development method. The embedded software development method includes the steps of 1, demand analysis, wherein specific requirements on system development are acquired; 2, preliminary design, wherein a scheme for achieving a target system is sought according to the result generated at the demand analysis stage; 3, detailed design, wherein a response algorithm and an internal data structure are determined for a module in software, and precise description of specific achievement of the target system is acquired; 4, encoding, wherein the scheme designed in the step 3 is described through a computer programming language, and a program executed on a computer is obtained; 5, generating of executive codes; 6, compiling, wherein a source program on a host machine is compiled into object codes; 7, interlinking; 8, debugging, wherein a cross debugger is used for debugging the program, and the debugged program runs on different machines; 9, testing; 10, curing running. Development of embedded software is designed, compiled, debugged, tested and subjected to curing running, so that the expandability of a system is improved, integration of all assemblies is improved, and the development period of the embedded software is shortened.

The invention discloses a method for supporting simultaneous descrambling of multiple programs and a system thereof. The method comprises the steps that a CA core processes the data of a condition receiving table and a program mapping table to notify a CA middleware to start descrambling the required data channel for receiving authorization management information and authorization control information; and the CA middleware finds a corresponding bottom data channel ID according to the index and develops the data channel for receiving the authorization management information and the authorization control information required for respective descrambling of multiple programs on the corresponding bottom data channel and sets a descrambling channel of audio and video control words. According to the method, the CA is enabled to better support application extension, and application extension has low modification influence on the CA middleware part so that the function involving multipath data processing can be more rapidly integrated and the compatibility is higher. The existing CA is enabled not to limit application extension, multiple programs can be simultaneously processed and multiple program messages can be simultaneously managed so as to be applied to multiple scenes.

A method of forming a semiconductor device includes providing a semiconductor structure that includes a first semiconductor material extending from a first region to a second region. The method further includes removing a portion of the first semiconductor material in the second region to form a recess, where the recess exposes a sidewall of the first semiconductor material disposed in the first region; forming a dielectric material covering the sidewall; while the dielectric material covers the sidewall, epitaxially growing a second semiconductor material in the second region adjacent the dielectric material; and forming a first fin including the first semiconductor material and a second fin including the second semiconductor material.

The invention discloses a portable balise tester. The portable balise tester comprises a detection host and a detection antenna unit; the detection hose is connected with the detection antenna unit by use of a feeder; the detection host comprises a power module, a detection mainboard, a data processing unit, a power switch and an interface; the power module is connected with the detection mainboard and the power switch; the detection mainboard is connected with the data processing unit and the interface. The portable balise tester is capable of providing a convenient detection method to realize regular inspection on good or bad conditions of the balise devices, and replacing or repairing the balise devices immediately as long as failures are found out.

The present invention discloses a multi-target cross-debug system based on software development platform. The system comprises a drive layer, a middleware layer, an operating system layer, a drive layer and a hardware layer. The drive layer is used for providing required drive support for an operating system and an application. The drive layer comprises a board-level initialization program, a system driver and a software driver. The middleware layer comprises an embedded CORBA, an embedded JAVA and an embedded DCOM. The operating system layer comprises a TCP / IP network, a file system, a kernel, a power manager and an embedded GUI. The hardware layer is used for connecting with the drive layer. According to the system provided by the present invention, hierarchical structure design is performed by using the drive layer, the middleware layer, the operating system layer, the drive layer and the hardware layer, so that scalability of the system is improved, integration of components is improved, and the development period of embedded software is shortened.

The invention discloses a fabrication process of conductivity type doubling and twisting yarns. The process comprises the following steps: a, a first drafting zone between a front roller and a middle roller and a second drafting zone between the middle roller and a rear roller among three rows of rollers are formed, wherein the drafting multiples of the first drafting zone and the second drafting zone are different; b, conductive fiber, elastic fiber and positioning adjusting fiber are respectively hung on a suspended spindle of a three-roller spinning frame in the step a, and the conductive fiber and the positioning adjusting fiber are simultaneously and persistently fed from the middle roller of the spinning machine; through speed change of the middle roller, overfeeding and drafting of the first drafting zone are performed, so that first fiber strands with choppy bamboo joint style are formed; at the same time, the elastic filer is continuously fed from the rear roller of the spinning machine, through speed change of the rear roller, overfeeding is performed, and through the drafting of the first drafting zone and the second drafting zone, second fiber strands with gradient bamboo joint style are formed; c, the first fiber strands and the second fiber strands in the step b are combined simultaneously through the front roller and are then twisted to form doubling and twisting yarns with a special style.

The invention discloses a workflow instance time prediction analysis method for an intelligent office automation system. The invention discloses an intelligent office automation system workflow instance time prediction analysis method, which mainly comprises the following steps of: predicting and analyzing workflow instance time of an intelligent office automation system on the basis of a BPM (Service Process Managency); the method comprises the following steps: establishing an office system environment of a workflow engine, extracting workflow instance time prediction characteristics, predicting workflow instance time based on SVR (Support Vector Regression), recommending a dynamic workflow path, and analyzing and evaluating overtime risks based on a Bayesian network. According to the support vector regression based on data driving, the internal interdependence relationship of the data can be found by learning the known workflow data, so that the prediction and judgment capability ofunknown data is obtained; and the dynamic workflow path recommendation system plans an optimal flow path by using a strategy of dynamically adjusting the weight according to the dynamically changed service flow information, and further improves the working efficiency of the user in combination with risk evaluation.

The invention discloses an infrared focal plane array and an infrared thermal imaging system based on the infrared focal plane array, and belongs to the field of the infrared thermal imaging. The infrared focal plane array comprises a plurality of array units in periodical arrangement, each array unit comprises a substrate, an insulation support layer, a sub-wavelength grating structure and an infrared absorbing layer; the infrared thermal imaging system based on the infrared focal plane array comprises a wavelength conversion module, a read-out signal production module and an imaging displaymodule; a core element of the wavelength conversion module is the infrared focal plane array; the infrared radiation from a target is focused on the focal plane, the infrared image information of thetarget is converted into the temperature distribution information on the focal plane array; the read-out signal production module is used for producing linear polarization narrow-band near infrared ray and enabling the linear polarization narrow-band near infrared ray to enter the imaging display module after being reflected by the infrared focal plane array, thereby realizing target object visualization. The system disclosed by the invention realizes large-area array, high-pixel, low-cost and quick-response thermal imaging system design.

The invention discloses a conductive doubled and twisted yarn which comprises a plurality of elastic fibers, a plurality of conductive fibers and a plurality of positioning adjusting fibers. The conductive fibers are provided with a plurality first bending portions, the positioning adjusting fibers are provided wit a plurality of second bending portions, and the first bending portions and the second bending portions are symmetrical with one another. The conductive doubled and twisted yarn has the advantages that the conductive doubled and twisted yarn is simple in structure and smart in design and is provided with the positioning adjusting fibers, so that the elastic fibers can be stretched or contracted within elastic ranges of the elastic fibers; the conductive fibers with the multiple first bending portions can be stretched and contracted along with the elastic fibers, accordingly, the doubled and twisted yarn is conductive, a fabric made of the doubled and twisted yarn by means of weaving is high in elasticity and resilience, and the conductive doubled and twisted yarn is greatly favorable for improving the stability, the durability and the convenience of the fabric made of the doubled and twisted yarn by means of weaving during actual usage.

An integrated circuit device includes a memory including a memory cell insulation surrounding a memory stack and a memory cell interconnection unit, a peripheral circuit including a peripheral circuitregion formed on a peripheral circuit board, and a peripheral circuit interconnection between the peripheral circuit region and the memory structure, a plurality of conductive bonding structures on aboundary between the memory cell interconnection and the peripheral circuit interconnection in a first region, the first region overlapping the memory stack in a vertical direction, and a through electrode penetrating one of the memory cell insulation and the peripheral circuit board and extended to a lower conductive pattern included in the peripheral circuit interconnection in a second region,the second region overlapping the memory cell insulation in the vertical direction.

The invention discloses a conductive blended yarn. The conductive blended yarn comprises a plurality of elastic fibers and a plurality of composite fibers, wherein the composite fibers are provided with a plurality of flexural parts and are formed by combining a plurality of conductive fibers and a plurality of positioning adjustment fibers. The conductive blended yarn is simple in structure and ingenious in design; due to the fact that the composite fibers formed by combining the conductive fibers and the positioning adjustment fibers are arranged and are provided with the flexural parts, when the elastic fibers are drawn or contracted within the elasticity range of the elastic fibers, the composite fibers can be drawn or contracted with the elastic fibers, the blended yarn has the characteristic of conductivity, a fabric woven from the blended yarn has high elasticity and rebound resilience, and the stability, the durability and the convenience of the fabric woven from the blended yarn in practical use are greatly improved.