148 results about "Polycrystalline silicon carbide" patented technology

This disclosure relates to an intermediate substrate (10) for the fabrication of a semiconductor substrate, comprising successively: a first semiconductor layer (2), a first thermal barrier layer (5), a support (13) comprising an absorption layer (3) configured to absorb laser radiation in a predetermined wavelength range, the temperature of the absorption layer (3) increasing during absorption, and a separation zone (8) adjacent to the absorption layer (3) and configured to thermally degrade under the effect of the temperature increase of the absorption layer, so as to separate at least a portion of the support (13) from the remainder of the intermediate substrate (10). (Shortcut figure: Fig. 1)

To provide a high resistivity polycrystalline substrate, and a method for manufacturing the high resistivity polycrystalline substrate.SOLUTION: A method contains steps of: forming a polycrystalline substrate having a high resistibility (e.g., 1×10^5 or 1E+5 ohmic centimeter or more); forming a single crystal substrate by fusing a semiconductor grade silicon with a high grade, and thereafter, using a seed crystal, and starting a formation of the single crystal; bonding a second surface of the polycrystalline substrate when the polycrystalline substrate and the single crystal substrate are formed to a third surface of the single crystal substrate by using a surface active bonding (SAB) technique; and removing one part of the single crystal substrate.SELECTED DRAWING: Figure 4A

The present invention relates to the field of the preparation of silicon carbide crystals, and in particular to a device and method for the diameter expansion growth of a silicon carbide crystal. The device comprises a graphite diameter expansion device comprising a porous graphite diameter expansion ring. The porous graphite diameter expansion ring serves as a gas channel and is used for releasing an accumulated growth atmosphere during the diameter expansion growth of the silicon carbide crystal. The porous graphite diameter expansion ring not only ensures the smoothness of gas exhaust, but also solves the problem of polycrystalline silicon carbide growing on an edge of a silicon carbide seed crystal hindering the diameter expansion of the silicon carbide crystal. In addition, in the axial direction of the graphite diameter expansion device and in a direction away from the silicon carbide seed crystal, the porosity of the porous graphite diameter expansion ring gradually decreases, so that the growth atmosphere in a graphite crucible is controlled to ensure that the growth atmosphere can be discharged in time when the growth atmosphere is excessive in the early stage, and the discharge amount is reduced when the growth atmosphere in the later growth stage is insufficient, thus increasing the growth rate of the silicon carbide crystal. In addition, hard graphite felt is arranged around the diameter expansion device to serve as a heat insulation material, so that a rational temperature gradient of silicon carbide crystal growth is maintained.

The invention belongs to the technical field of silicon carbide crystals, and particularly relates to a polycrystalline silicon carbide rod, a preparation device and method thereof and polycrystalline silicon carbide powder. The preparation device comprises a reactor, the reactor comprises a bottom plate, a cover body and a deposition carrier in the cover body, an exhaust hole is formed in the center of the bottom plate, an electrode connected with the deposition carrier penetrates through the exhaust hole, and an air inlet is formed in the outer side of the electrode; the air inlet pipe extends into the reactor through the air inlet hole; comprising an air exhaust pipe, an air exhaust part, an air exhaust control part and a negative pressure monitoring part, the first end of the air exhaust pipe is communicated with the interior of the reactor through an air exhaust hole, the end portion of the first end of the air exhaust pipe is lower than the lower end of the deposition carrier, the second end of the air exhaust pipe is communicated with the air exhaust part, and the negative pressure monitoring part monitors whether the pressure in the reactor is within the range of 0.001 bar-0. 1 bar or not; the air exhaust control part is connected with the negative pressure monitoring part and the air exhaust part. The compactness of the silicon carbide rod and the purity of the powder can be improved.

The present application provides a solar cell and a preparation method thereof, which belongs to the field of photovoltaic technology. The solar cell comprises: a silicon wafer base layer; a boron-doped silicon layer located on the front side of the silicon wafer base layer; a tunneling oxide layer and a phosphorus-doped polycrystalline silicon carbide layer arranged in sequence on the back side of the silicon wafer base layer. Among them, the phosphorus-doped polycrystalline silicon carbide layer is doped with oxygen atoms. The solar cell provided by the present application is conducive to avoiding the film explosion phenomenon of the polycrystalline structure layer in the solar cell, and enhances the passivation performance of the solar cell; it is also conducive to improving the anti-silver paste corrosion ability of the polycrystalline structure layer, effectively reducing the metal piercing on the back side of the solar cell and the metal recombination in the solar cell, thereby effectively improving the photoelectric conversion efficiency, open circuit voltage and short circuit current of the solar cell.

A silicon carbide seed is provided, including a first seed layer and a second seed layer. The first seed layer includes a polycrystalline silicon carbide material. The second seed layer is directly attached to the first seed layer, where the second seed layer includes a single crystal silicon carbide material, and a thickness ratio (T2 / T1) of a thickness T1 of the first seed layer to a thickness T2 of the second seed layer is in a range of 10% to 50%.

The present disclosure relates to a chemical mechanical polishing (CMP) composition for polishing polycrystalline silicon carbide-containing surfaces. More specifically, the polishing composition is in the form of a slurry having a pH of 8 or greater that includes an oxidizing agent and an abrasive.

The invention discloses a TopCon cell and a TopCon cell preparation method, and belongs to the field of solar cells. The structure of the passivation layer is optimized, the doped polycrystalline silicon layer is reserved in the metal contact area, the doped polycrystalline silicon layer and the substrate form a high-low junction to provide field passivation, and ohmic contact is formed between the doped polycrystalline silicon layer and the electrode; a doped polycrystalline silicon carbide layer is arranged in a non-metal contact area, and the doped polycrystalline silicon carbide layer and a substrate form a heterojunction to provide field passivation and serve as a carrier transverse transmission layer. The parasitic absorption of the passivation layer is reduced by removing the doped polycrystalline silicon layer in the non-metal contact region. The light absorption coefficient of the doped polycrystalline silicon carbide layer is low and the doped polycrystalline silicon carbide layer is thin, so that parasitic absorption can be reduced. Ohmic contact is formed between the doped polycrystalline silicon layer in the reserved metal contact area and the electrode, so that low recombination loss can be ensured when the doped polycrystalline silicon layer is in contact with the metal grid line. Field passivation is formed in the metal contact area and the non-metal area, and the passivation effect of the whole surface of the substrate is guaranteed.

According to the silicon carbide / diamond multi-layer composite film and the preparation method thereof, a polycrystalline silicon carbide matrix in the multi-layer composite film is a bottom layer, and the multi-layer composite film has high strength, high rigidity, high heat conductivity and oxidation resistance; the components of the gradient SiC-C transition layer gradually change from pure SiC to rich C-SiC and then to diamond-like carbon, and the gradient SiC-C transition layer is used for slowly releasing thermal stress and enhancing binding force; the nanocrystalline diamond is used as the top layer and has high hardness, low friction coefficient, particle scouring resistance and high infrared transmittance; the silicon carbide / diamond multi-layer composite film is obtained through a chemical vapor deposition method, the process is mature, and the silicon carbide / diamond multi-layer composite film has good heat conduction performance and infrared transmittance and is suitable for infrared guidance systems with extremely severe working environments, such as optical materials of fairings, optical windows and the like.

The invention relates to a polishing method for a polycrystalline silicon carbide substrate, and belongs to the field of polishing of polycrystalline silicon carbide substrates. The method comprises the following steps: (1) roughly polishing a silicon carbide wafer until Ra is not greater than 0.3 nm by adopting a polyurethane polishing pad and an oxidant-free nano-diamond polishing solution; the Shore D hardness of the polyurethane polishing pad is 70 to 75; and (2) a damping cloth polishing pad is adopted, and pure silica sol without an oxidizing agent serves as a polishing solution to conduct fine polishing till Ra is not larger than 0.2 nm. According to the method, the polyurethane high-hardness polishing pad is matched with the nano-diamond polishing solution to mechanically polish the polycrystalline silicon carbide, so that orange peel defects on the surface of the polycrystalline silicon carbide are avoided, and the surface roughness is reduced; furthermore, a damping cloth polishing pad is matched with an oxidant-free nano silica sol polishing solution for fine polishing, so that the roughness of the surface of the wafer can be further reduced.

The utility model discloses a Sic VDMOSFET structure with lower manufacturing cost, which relates to the technical field of semiconductor power devices and comprises a drain electrode, a conductive substrate layer arranged above the drain electrode, conductive epitaxial layers arranged on two sides of the upper end of the conductive substrate layer, a conductive column area arranged in the middle of the upper end of the conductive substrate layer, and a conductive electrode arranged in the conductive column area. A gate dielectric layer and a gate electrode are arranged above the conductive column region, a conductive polycrystalline silicon carbide layer is arranged in the gate dielectric layer, buffer structures are arranged above the two conductive epitaxial layers, and a conductive power supply region and a conductive well region are respectively arranged above the two buffer structures. According to the Sic VDMOSFET structure with the low manufacturing cost, the use stability of a Sic VDMOSFET device is improved, the resistance value of the Sic VDMOSFET device can be adjusted in time along with high temperature generated during power transmission, and meanwhile the problem that electric leakage loss occurs due to the fact that current is increased due to medium heating caused by movement of charged particles is solved.

Semiconductor wafers, methods, and semiconductor devices are provided. In one example, a semiconductor wafer includes a polycrystalline silicon carbide substrate. The semiconductor wafer includes a wide bandgap epitaxial layer on the polycrystalline silicon carbide substrate.

The invention relates to the technical field of semiconductor material processing, in particular to a preparation method of a low-roughness polycrystalline silicon carbide substrate and a composite substrate. The preparation method comprises the following steps: preparing a polycrystalline silicon carbide substrate; the polycrystalline silicon carbide substrate is provided with a to-be-bonded surface and a back surface; the to-be-bonded surface comprises a useful area and an edge area; placing the two polycrystalline silicon carbide substrates in a closed chamber in parallel, so that the to-be-bonded surfaces of the two polycrystalline silicon carbide substrates are opposite to each other and a first distance is kept between the to-be-bonded surfaces of the two polycrystalline silicon carbide substrates; inert gas is filled in the closed cavity, and air pressure is formed in the closed cavity; raising the temperature of the closed chamber to a first temperature, and carrying out heat preservation at the first temperature until the surface roughness of the useful regions of the two polycrystalline silicon carbide substrates is less than 1nm; and removing the edge region to obtain the two low-roughness polycrystalline silicon carbide substrates. According to the preparation method, the surface roughness of the polycrystalline silicon carbide substrate reaches below 1nm, and the surface roughness of the polycrystalline silicon carbide substrate with the roughness can meet the bonding requirement.

A composite structure for manufacturing microelectronic components, includes a monocrystalline thin film on a support substrate made of polycrystalline silicon carbide, the support substrate having, on each of its faces, a preferential crystalline orientation on each of its faces, according to which: a texture coefficient C422 is less than 40%, and the sum of texture coefficients C220+C200+C400 is greater than 50%, preferably greater than 80%. A method is used to manufacture such a composite structure.

The present disclosure relates to a polycrystalline silicon carbide (SiC) substrate having high resistivity and a method for manufacturing the same. A polycrystalline SiC wafer or substrate with high resistivity facilitates the functionality of a high power electronic device or system in which the polycrystalline SiC wafer or substrate is present, or the polycrystalline SiC wafer or substrate is used to fabricate the high power electronic device or system. At least one embodiment of the wafer includes a polycrystalline SiC wafer or substrate having a high resistivity (e.g., equal to or greater than 1 * 105 or 1E + 5 ohm-cm) and a low warpage. Electronic devices or components made using or from wafers including high resistivity polycrystalline SiC wafers or substrates are further optimized at the time of use and have fewer to none crystal defects. The wafers formed according to the embodiments of the present disclosure have high or very high resistivity compared to existing polycrystalline SiC wafers or substrates.

This invention relates to a processing method for high thermal conductivity polycrystalline silicon carbide wafers, comprising the following steps: grinding and thinning a CVD-prepared polycrystalline silicon carbide wafer to obtain a pre-treated wafer; performing a full-coverage ablation treatment on the surface of the pre-treated wafer using a picosecond laser to form a modified wafer with an amorphous surface modification layer; and polishing and cleaning the modified wafer to obtain the finished wafer. This method introduces a picosecond laser into the CMP front-end for laser ablation and surface modification of the polycrystalline SiC wafer, followed by rough and fine polishing using CMP. The results show that CMP time is reduced by more than 40%, significantly improving CMP efficiency and reducing costs, while ultimately achieving a surface roughness of 0.2 nm, meeting the requirements of sub-nanometer roughness and no subsurface damage.

Provided is a processing liquid for semiconductor production, which has excellent ability to remove defects from a specific material when used for cleaning an object to be processed that contains at least one material (specific material) selected from the group consisting of polycrystalline silicon, silicon carbide, and silicon carbonitride. This processing liquid for semiconductor production contains a polycarboxylic acid and a polymer containing a repeating unit (A) derived from a nonionic monomer and a repeating unit (B) having an anionic group.

The invention relates to the technical field of silicon carbide production, and discloses a polycrystalline silicon carbide vapor phase growth device, the bottom of a crucible is used for placing silicon carbide powder, the upper end of the crucible is provided with a seed crystal cover for installation, and the lower end of the seed crystal cover is uniformly provided with a plurality of seed crystals; a plurality of heat conduction channels used for transferring heat are installed on the side, close to the outer side, in the thermal resistance block in a surrounding mode, a heat conduction column used for conducting heat is fixedly installed at the center of the thermal resistance block, it is ensured that heat can be evenly and efficiently transferred to a seed crystal area according to a preset path through a heat conduction mechanism, temperature fluctuation caused by disordered heat transfer is reduced, and the heat conduction efficiency is improved. According to the heat conduction column, heat can be stably conveyed to a seed crystal area, the spiral shape of the upper end and the lower end of the heat conduction column optimizes the heat transfer path, the thermal stress in the seed crystal growth process is reduced, a more stable and concentrated heat source is provided for crystal growth, and then the spiral dislocation forming probability is reduced.

An integrated circuit is formed on a substrate of single crystal silicon carbide or a composite substrate with a top layer of single crystal silicon carbide (and optionally a bottom layer of polycrystalline silicon carbide or a sacrificial material). An active layer (which may be an oxide such as Ga2O3) is epitaxially grown on the substrate, and an active device is formed in the active layer. A handle is bonded to a top surface of the active device. At least a portion of the substrate is removed from a backside of the integrated circuit.

The invention relates to a composite structure having a front face and a rear face extending parallel to a main plane, which structure comprises: - a useful layer of single-crystal silicon carbide, a free face of which constitutes the front face, which layer has a first concentration of N-type dopants; - a carrier substrate made of polycrystalline silicon carbide, a free face of which constitutes the rear face, which substrate has a second concentration of N-type dopants, the second concentration being higher than the first concentration; - an intermediate region extending along the main plane and including an interface zone between an assembled face of the useful layer and an assembled face of the carrier substrate; the composite structure being characterised in that the intermediate region comprises inclusions of single-crystal silicon carbide in direct contact with the useful layer and extending, in a direction normal to the main plane, between grains of the carrier substrate, the inclusions having a third concentration of N-type dopants which is between the first concentration and the second concentration. The invention also relates to a method for producing such a composite structure.

The invention relates to a device and a method for preparing polycrystalline silicon carbide, polycrystalline silicon carbide and application thereof. The apparatus comprises: a crucible; the graphite substrate is arranged on the crucible and is positioned at the upper part of the crucible; the air channel structure is arranged in the crucible and is used for introducing air into the crucible; the baffle is arranged in the crucible, a gap is formed between the baffle and the graphite substrate, a projection covers the graphite substrate, and a gap is formed between the baffle and the bottom wall of the crucible; and the heater is arranged in the crucible and is lower than the baffle. The device can be used for manufacturing polycrystalline silicon carbide with low resistivity.

The invention relates to a method for conditioning a composite structure comprising a single-crystal silicon carbide thin layer (11) arranged on a polycrystalline silicon carbide carrier substrate, the composite structure having a front side on the side of the single-crystal silicon carbide thin layer and a rear side opposite the front side. After forming an element (30) of the electronic component on the front side of the composite structure, the method comprises grinding the composite structure from its back side and removing a work-hardened layer (22) present on the surface of the back side due to the grinding process.

The invention relates to the technical field of crystal growth, in particular to a liquid phase method crystal growth device and method. A liquid phase method crystal growth device comprises a cavity, a crucible is installed in the cavity, a hollow cylindrical structure is installed at the bottom of the crucible, a partition plate is arranged in the cylindrical structure, and the lower surface of the partition plate is connected with a lifting mechanism. The lifting mechanism is used for driving the partition plate to move up and down between the position A and the position B along the inner wall of the cylindrical structure and supporting the partition plate to be fixed to any position between the position A and the position B, and the position A is higher than the position B; a gas interlayer can be formed between the partition and the lower surface of the crucible bottom. The partition plate is arranged below the bottom of the crucible, after polycrystalline silicon carbide is generated at the bottom of the crucible, the partition plate is moved downwards, a gas interlayer is formed between the lower surface of the bottom of the crucible and the partition plate, the phenomenon that heat dissipation of the bottom is enhanced due to the fact that the polycrystalline silicon carbide has high heat conductivity is counteracted, and therefore the stability of a temperature field in a solution is guaranteed.

The present invention provides a treatment liquid for manufacturing a semiconductor, in which, in a case where the treatment liquid is used for cleaning an object to be treated, containing at least one (specific material) selected from the group consisting of polysilicon, silicon carbide, and silicon carbonitride, defect removability on the specific material is excellent. The treatment liquid for manufacturing a semiconductor of the present invention contains a polycarboxylic acid and a polymer including a repeating unit A derived from a nonionic monomer and a repeating unit B having an anionic group.

Disclosed is a method for manufacturing a substrate, comprising the following series of steps: a) using an initial substrate (1) made of polycrystalline silicon carbide, comprising a rough surface (10) having a random distribution of holes; b) forming a filling layer on the rough surface (10) so as to close off at least an upper portion (110) of the holes, the filling layer being made of a material chosen from amorphous silicon, polycrystalline silicon, and graphite; c) flattening the filling layer; d) causing a chemical reaction to take place between a reagent and the flattened filling layer (2') during step c) so as to convert at least the surface of the flattened filling layer (2') into polycrystalline silicon carbide.

A passivated contact structure and a preparation method therefor, and a solar cell. The passivated contact structure comprises a tunneling layer (2) and a polycide layer (31), the polycide layer (31) being a polycrystalline silicon oxide layer and / or a polycrystalline silicon carbide layer, wherein the polycide layer (31) is of an n type or a p type, a doping element is doped into the polycide layer (31) at a mass concentration ranging from 1.49×1020 to 3×1020.

The invention provides a solar cell, a preparation method thereof and a photovoltaic module. The preparation method comprises the following steps that a tunneling oxide layer, a p + doped amorphous silicon carbide layer and a p + doped amorphous silicon layer are sequentially arranged on the back face of a silicon substrate in the direction away from the silicon substrate; grooves which are distributed at intervals and penetrate through the p + doped amorphous silicon layer are formed in the p + doped amorphous silicon layer, then channels are formed in the junctions of the grooves and the p + doped amorphous silicon layer, the tunneling oxide layer is divided into a P region and an N region, the p + doped amorphous silicon carbide layer and the p + doped amorphous silicon layer are arranged on the P region, and the p + doped amorphous silicon carbide layer is arranged on the N region; performing crystallization treatment, so that the p + doped amorphous silicon carbide layer and the p + doped amorphous silicon layer on the P region are respectively converted into a p + doped polycrystalline silicon carbide layer and a p + doped polycrystalline silicon layer, and the p + doped amorphous silicon carbide layer on the N region is converted into an n + doped polycrystalline silicon carbide layer; and performing post-treatment to obtain the solar cell.

The invention relates to a method for controlling the quality of a composite structure comprising a thin layer made of single-crystal silicon carbide placed on a carrier substrate made of polycrystalline silicon carbide, the method comprising: a) inspection of a free surface (10a) of the thin layer (10) using a technique coupling visible-light confocal microscopy and photoluminescence imaging, making it possible to detect defects, called secondary defects, b) preliminary identification of the secondary defects, by similarity, on the basis of their visible-light image, by virtue of an image recognition algorithm trained on various types of defects such as holes, bubbles, scratches, and defects of crystalline origin; at the end of step b), each secondary defect is associated with one identified type of defect, with a certain level of similarity, c) final classification of at least certain secondary defects by application of the following first conditions: - if the level of similarity associated with a secondary defect is greater than a high level, said secondary defect is definitively classified in the identified type of defect, - if the level of similarity associated with the secondary defect is between a low level and the high level, the photoluminescence image of said defect is analysed; if the secondary defect is associated with a labelled type of PL defect, said secondary defect is definitively classified in the identified type of defect, - in all other cases, the secondary defect is definitively classified as not a defect.

A semiconductor structure includes a semiconductor substrate of a first conductivity type. The semiconductor substrate can have an upper surface and a bottom surface. The semiconductor substrate can be made of polycrystalline silicon carbide. The semiconductor structure can further include a drift region of the first conductivity type located on the upper surface of the semiconductor substrate. The semiconductor structure can further include a first region of the upper surface of the semiconductor substrate including a formation region of a transistor, and a second region of the upper surface of the semiconductor substrate, adjacent to the first region, including a formation region of a Schottky barrier diode.

The invention provides a device and a method for preparing silicon carbide crystals by an HTCVD (High Temperature Chemical Vapor Deposition) method, the device comprises a crucible as well as a first chamber and a second chamber which are arranged in the crucible and are sequentially connected along the flowing direction of a gas source, and the first chamber and the second chamber are connected through a gas pipeline; the first cavity is sequentially provided with a first gas source pipeline and a first silicon carbide growth area in the gas source flowing direction; and the second cavity is sequentially provided with a second gas source pipeline and a second silicon carbide growth area along the gas source flowing direction. The device and the method can simultaneously grow single crystal silicon carbide and polycrystal silicon carbide, increase the gas utilization rate, reduce the production cost, and prevent the exhaust pipeline from being blocked by tail gas.