The invention discloses a drawing method for polycrystalline silicon layer device auxiliary graphs. The drawing method includes the steps that a complete design layout of active area layers, a polycrystalline silicon layer, a thick oxide layer and all avoidance layers is obtained; the active area layers overlapped with the polycrystalline silicon layer are selected through the layout logic operation, edges, which are not in contact with the polycrystalline silicon layer, of the active area layers which are overlapped with the polycrystalline silicon layer are screened, the edges are expanded outwards by a first size and a second size sequentially, the value of the second size is larger than that of the first size, and a first polygon and a second polygon are obtained respectively; the part, coinciding with the first polygon, in the second polygon and the part of a prohibiting area of the polycrystalline silicon layer device auxiliary graph are removed, and the first polycrystalline silicon device auxiliary graph is obtained; finally, the first polycrystalline silicon device auxiliary graph is processed after being finished with the logic operation according to a technical node and the photolithographic process capacity, and the second polycrystalline silicon layer device auxiliary graph is formed. Thus, the drawing method can overcome the defect of leak adding due to design negligence, and much precious time is saved for on-time production of products.