50results about How to "Reduce growth defects" patented technology

The invention discloses a preparation device and application of a silicon carbide single crystal, and belongs to the field of preparation of single crystals. The preparation device of the silicon carbide single crystal comprises a crucible, a charging basket and a rotary lifting unit, the crucible comprises an upper crucible and a lower crucible; wherein the charging bucket comprises a bucket bodyand an opening part, the bucket body is arranged in the lower crucible, the opening part is rotatably connected with the upper crucible, and the charging bucket and the upper crucible form a growth cavity for preparing the silicon carbide single crystal by a physical vapor transport method; an isolation cavity is formed between the charging bucket and the lower crucible; the rotary lifting unit drives the charging bucket to rotate and lift relative to seed crystals. According to the preparation device, the charging bucket is accurately and stably located in the center of the crucible servingas a heating body in the rotary lifting process, the interior of the charging bucket is heated evenly due to the consistent temperature of the sections of the charging bucket in all directions, then the defects that carbon inclusions are generated in the prepared silicon carbide single crystal and the like are overcome, and the quality of the prepared silicon carbide single crystal is improved.

The invention discloses a manufacturing method of a high-tensile lithium battery copper foil. Copper is dissolved so that a main electrolyte can be prepared; the main electrolyte is subjected to multi-stage filtering and then mixed with an additive solution so that an electrolyte solution can be obtained; and electrolyzing is performed under the temperature of 30-70 DEG C and the electric currentdensity of 30-85 A / dm2 so that an original foil can be made. The lithium battery copper foil manufactured by the method is good in effects of the tensile strength and the ductility, and the color andthe brightness of the copper foil are stable and can be easily controlled. The tensile strength of the copper foil is obviously improved by using a thiourea compound as a C-type additive.

There is disclosed a photovoltaic cell, such as a solar cell, incorporating one or more epitaxially grown layers of SiGe or another germanium material, substantially lattice matched to GaAs. A GaAs substrate used for growing the layers may be removed by a method which includes using a boundary between said GaAs and the germanium material as an etch stop.

In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second heat treatment process is performed while stopping introducing the first gas and introducing a second gas having an oxygen gas in an amount of 20 vol. % or more and 100 vol. % or less and a rare gas. In the first heat treatment process, the silicon wafer is rapidly heated to first temperature of 1300° C. or higher and a melting point of silicon or lower at a first heating rate, and kept at the first temperature. In the second heat treatment process, the silicon wafer is kept at the first temperature, and rapidly cooled from the first temperature at a first cooling rate.

The invention provides a photoelectric detector. The photoelectric detector comprises a substrate silicon layer, a buried silicon dioxide layer located on one part of the surface of the substrate silicon layer, a top silicon layer positioned on the surface of the buried silicon dioxide layer, a P type light-doped layer positioned on the surface of the substrate silicon layer that is not provided with the buried silicon dioxide layer, and a photoelectric conversion layer positioned on the surface, far away from the substrate silicon layer, of the P type light-doped layer. The part of the substrate silicon layer, the buried silicon dioxide layer and the top silicon layer form an optical coupling area and a waveguide area. The top silicon layer in the optical coupling area is provided with acoupling grating. The material of the P type light-doped layer comprises a first intrinsic semiconductor material. The photoelectric conversion layer is provided with an intrinsic region, a P-type region and an N-type region. The material of the photoelectric conversion layer comprises a second intrinsic semiconductor material. The first intrinsic semiconductor material is the same as the second intrinsic semiconductor material. The dark current of the photoelectric detector is small.

Semiconductor devices including a substrate (e.g., silicon substrate), a multi-layer structure disposed on a portion of the substrate, and at least one electrode disposed on the multi-layer structure and methods of manufacturing the same are provided. The multi-layer structure may include an active layer containing a Group III-V material and a current blocking layer disposed between the substrate and the active layer. The semiconductor device may further include a buffer layer disposed between the substrate and the active layer. In a case that the substrate is a p-type, the buffer layer may be an n-type material layer and the current blocking layer may be a p-type material layer. The current blocking layer may contain a Group III-V material. A mask layer having an opening may be disposed on the substrate so that the multi-layer structure may be disposed on the portion of the substrate exposed by the opening.

The invention discloses a sapphire composite substrate and a preparing method thereof. The sapphire composite substrate comprises an alumina layer. The preparing method comprises the steps of growing a mask layer on a sapphire substrate which is cleaned to tidy, plating photoresist on the mask layer, then performing photoetching on the area without patterns on the mask layer by means of photoetching technology, etching by means of BOE solution or performing reactive ion etching (RIE) after photoetching, eliminating the mask layer area which is not protected by the photoresist, eliminating the residual photoresist by means of wet-method solution, etching the sapphire substrate under protection of the mask layer until the bottoms of adjacent patterns are connected, cleaning the patterned sapphire substrate according to a wet method, and depositing an aluminium nitride layer on the sapphire substrate by means of sputtering equipment, thereby forming the sapphire composite substrate. Therefore the preparing method of the sapphire composite substrate according to the invention can realize preparation of the large-area and low-cost industrialized composite patterned sapphire substrate.

The invention relates to a method for improving poly-crystal quality by using a re-melting technology. The method comprises the steps that: material is loaded; a silicon material is ensured to be completely molten before entering a crystal growth process, a heat exchanger DS-Block central point temperature TC2 is 1400 DEG C (plus or minus 3 DEG C); a first step of crystal growth is carried out, wherein a thermal insulation cage is rapidly lifted to 8-10cm such that a crucible bottom temperature is rapidly reduced; a second step of crystal growth is carried out, wherein the thermal insulation cage is lifted to 10-12cm; a third step of crystal growth is carried out, wherein the thermal insulation cage is rapidly lowered to a zero position; a fourth step of crystal growth is carried out, wherein the thermal insulation cage position in the third step, and an ingot furnace temperature-control point temperature TC1 are maintained, and a crystal growth residual height is ensured at 1.3-1.7cm; a sixth step of crystal growth is carried out, wherein growth is carried out on rest crystal surface after re-melting; after the sixth step, growth is carried out according to normal crystal growth processes; and annealing and cooling are carried out according to normal processes after crystal growth is finished. The method provided by the invention has the advantages of simple operation and low cost. With the invention, crystal growth quality is substantially improved, and polysilicon photoelectric conversion efficiency is improved by 0.1-0.3%.

The invention discloses a catalyst for carbon nanotube as well as a preparation method and application thereof, and the method for preparing the catalyst for the carbon nanotube comprises the following steps: mixing an active component with an auxiliary component to obtain a mixed solution; mixing and coprecipitating the mixed solution and a precipitant, and then carrying out solid-liquid separation and drying to obtain a catalyst precursor; roasting the catalyst precursor, wherein mixing the active component with the auxiliary agent component and an alcohol or / and mixing the catalyst precursor with the alcohol in advance before roasting the catalyst precursor for size mixing, and roasting to obtain the catalyst for the carbon nanotube. The catalyst for the carbon nanotube prepared by adopting the method is relatively high in particle crystallinity, relatively uniform in particle size, relatively large in size and relatively small in specific surface area, the black fluffy carbon nanotube with good dispersity can be obtained when the catalyst is used for preparing the carbon nanotube, the carbon nanotube is used for preparing conductive paste, the two requirements of relatively low viscosity and high conductive effect can be met at the same time, and the cost is saved.

There is disclosed a photovoltaic cell, such as a solar cell, incorporating one or more epitaxially grown layers of SiGe or another germanium material, substantially lattice matched to GaAs. A GaAs substrate used for growing the layers may be removed by a method which includes using a boundary between said GaAs and the germanium material as an etch stop.

The invention discloses a three-dimensional memory and a manufacturing method thereof. The manufacturing method comprises the steps of forming a hard mask layer on a substrate and performing patterning; forming a semiconductor lug boss on the substrate through a hard mask pattern; forming a doped region on the top of the semiconductor lug boss; forming dielectric layer stack on the hard mask pattern and the semiconductor lug boss; and performing etching on the dielectric layer stack to form a perpendicular channel hole for exposing the semiconductor lug boss. By virtue of the manufacturing method of the three-dimensional memory disclosed in the invention, the doped lug boss is formed on the substrate firstly by the hard mask pattern, and then the channel hole is formed in the dielectric layer stack, so that the film forming quality, height and doping concentration uniformity of the lug boss at the bottom of the channel hole can be improved, the growth defects of the perpendicular channel region is lowered, and device reliability is improved.

The invention relates to a method for improving the growth quality of a silicon carbide epitaxial film. The method comprises the following steps: cleaning a substrate and placing the substrate on a small disc in a reaction chamber; vacuumizing the reaction chamber, then introducing hydrogen, and carrying out constant-temperature etching; changing the pressure and temperature of the reaction chambewithin 20-100 s in a linear slow change mode, meanwhile, introducing a carbon source and a silicon source a, and gradually changing the C / Si molar ratio from 0 to 0.80-1.10; changing the carbon sourceflow and the silicon source flow within 20-100 s in a linear gradual change mode, and keeping the C / Si molar ratio unchanged; and changing the temperature, the pressure, the carbon source flow and the silicon source flow to target conditions within 20-100s by adopting a linear gradual change mode, and carrying out epitaxial film growth until the target thickness and the like are reached. By adopting the method for improving the growth quality of the silicon carbide epitaxial thin film, the crystal defects of the epitaxial thin film of the epitaxial thin film can be remarkably reduced, the process control is simple, the operability is high, and the application prospect is better.

The invention discloses a silicon carbide single crystal growth graphite crucible capable of adjusting a ratio of carbon to silicon in a growth atmosphere. According to the invention, a cavity of the graphite crucible comprises a crucible raw material cavity and a crucible growth cavity, and the thickness of the graphite wall of the crucible raw material cavity is greater than the thickness of the graphite wall of the crucible growth cavity; the crucible raw material cavity comprises a silicon carbide powder cavity and at least two silicon powder cavities; and the top of the silicon powder cavity is connected with a silicon powder conveying pipe, and the silicon powder conveying pipe is also connected with a silicon powder bin outside the graphite crucible. According to the invention, the growth atmosphere can be adjusted by consuming certain gas-phase silicon in the growth process of a silicon carbide single crystal, and the ratio of carbon to silicon in the growth process of the silicon carbide single crystal is kept in an optimal range, so silicon liquid drops are prevented from appearing on the growth surface of the silicon carbide single crystal, and the growth quality of the silicon carbide single crystal is further improved.

Semiconductor devices including a substrate (e.g., silicon substrate), a multi-layer structure disposed on a portion of the substrate, and at least one electrode disposed on the multi-layer structure and methods of manufacturing the same are provided. The multi-layer structure may include an active layer containing a Group III-V material and a current blocking layer disposed between the substrate and the active layer. The semiconductor device may further include a buffer layer disposed between the substrate and the active layer. In a case that the substrate is a p-type, the buffer layer may be an n-type material layer and the current blocking layer may be a p-type material layer. The current blocking layer may contain a Group III-V material. A mask layer having an opening may be disposed on the substrate so that the multi-layer structure may be disposed on the portion of the substrate exposed by the opening.

The invention discloses a light-emitting diode chip manufacturing method capable of improving brightness. The method sequentially comprises the following processes: processing a substrate, growing a low-temperature GaN buffer layer, growing a non-doped GaN layer, growing a Si-doped N-type GaN layer, growing a multi-quantum well layer, growing an AlGaN electron blocking layer, growing a Mg-doped P-type GaN layer, and cooling. The process of growing the multi-quantum well layer sequentially comprises the steps of growing an MQWs1, growing an MQWs2 and growing an MQWs3, the process of growing the MQWs1 comprises the steps of growing an InGaN-1 well layer and an InGaN-2 well layer sequentially, the process of growing the MQWs2 comprises the steps of growing a P-type AlGaN / GaN high-potential barrier structure layer, and the process of growing the MQWs3 comprises the steps of sputtering a SiO2 / Al2O3 thin film and growing a GaN barrier layer. According to the invention, the quality of the quantum well is improved by adopting the novel LED quantum well preparation method, so that the brightness of the LED is improved.

The invention discloses an LED epitaxial wafer manufacturing method suitable for a small-spacing display screen. The method sequentially comprises the steps of: treating a substrate, growing a low-temperature GaN buffer layer, growing a non-doped GaN layer, growing a Si-doped N-type GaN layer, growing a multi-quantum well layer, growing an AlGaN electron blocking layer, growing a Mg-doped P-type GaN layer, and carrying out cooling. The step of growing the multi-quantum well layer sequentially comprises the steps of introducing a TMIn source, growing an MQWs1 and growing an MQWs2, the step of growing the MQWs1 comprises the steps of sequentially growing an InGaN well layer and an In<x>Al<y>Mg<1-x-y> layer, and the step of growing the MQWs2 comprises the steps of sequentially growing a GaO layer and a GaN barrier layer. The wavelength blue shift is reduced and the brightness of an LED is improved by adopting a novel LED epitaxial wafer manufacturing method, and the method is particularly suitable for manufacturing a small-spacing display screen.

The invention discloses high-impact-toughness cubic boron nitride (cBN). The synthetic raw materials comprise Li3N accelerant powder and high-purity hexagonal boron nitride powder with the weight ratio of 1:9-12. In the high-purity hexagonal boron nitride powder, by the weight ratio, the content of hexagonal boron nitride (hBN) is larger than or equal to 98%, and the content of B2O3 is smaller than or equal to 0.5%. The granularity of the high-purity hexagonal boron nitride powder is 20-30 microns. The granularity of the Li3N accelerant powder is 80-100 microns. The invention further discloses a synthetic method and application of the high-impact-toughness cBN. According to high-impact-toughness cBN crystals synthesized through the method, the granularity is that the Ti value of a 60 / 70 cBN single crystal is 61%-64%, the impact toughness value (Ti) of a 70 / 80 cBN single crystal is 67%-70%, and the Ti value of an 80 / 100 cBN single crystal is 75%-78%. The synthesized cBN single crystals are transparent and complete in crystalline form, the hBN conversion rate is 60-65%, and high industrial production value is achieved. The cBN is good in crystalline form, high in conversion rate and long in service life when being used for rough grinding machining.

The invention provides a semiconductor crystal growth device. The semiconductor crystal growth device comprises a furnace body; a crucible which is arranged in the furnace body and is used for accommodating a silicon melt; a pulling device which is arranged at the top of the furnace body and is used for lifting a silicon crystal bar out of the silicon melt; a flow guide cylinder which is barrel-shaped and is arranged above the silicon melt in the furnace body along the vertical direction, wherein the pulling device is used for pulling the silicon crystal bar to penetrate through the flow guide cylinder in the vertical direction; and a magnetic field applying device which is used for applying a magnetic field in the horizontal direction to the silicon melt in the crucible; wherein a step protruding downwards is arranged at the bottom of the flow guide cylinder, so that the distance between the bottom of the flow guide cylinder and the liquid level of the silicon melt in the direction of the magnetic field is smaller than the distance between the bottom of the flow guide cylinder and the liquid level of the silicon melt in the direction perpendicular to the magnetic field. According to the semiconductor crystal growth device provided by the invention, the growth quality of the semiconductor crystal is improved.

The invention provides a silicon carbide crystal growth method and device. The method comprises the steps: (1) an assembly stage; (2) a sublimation stage: controlling a plurality of separation platesto rotate until there is no gap between the plurality of separation plates and between the separation plates and the inner wall of a cavity, separating a first crucible from a second crucible, and heating to sublimate a silicon carbide raw material; and (3) a crystal growth stage: controlling the plurality of separation plates to rotate until a gap exists between the plurality of separation platesand / or between the separation plate and the inner wall of the cavity, communicating the second crucible with the first crucible through the gap, and heating to enable the silicon carbide raw materialatmosphere to pass through the gap to be transmitted to the seed crystal for crystal growth. By controlling rotation of the multiple separation plates, the first crucible and the second crucible areseparated, the sublimated atmosphere of the silicon carbide raw material cannot be conveyed upwards, the defect that the crystal quality is affected and seed crystals are damaged and polluted due to the fact that the unstable atmosphere is formed in the early growth stage is overcome, and the separation plates block heat radiation of the raw material to the seed crystals, so that the sublimation of the surface of the seed crystal caused by no silicon carbide atmosphere supplement during impurity removal is avoided.

In a manufacturing method for a silicon wafer, a first heat treatment process is performed on the silicon wafer while introducing a first gas having an oxygen gas in an amount of 0.01 vol. % or more and 1.00 vol. % or less and a rare gas, and a second heat treatment process is performed while stopping introducing the first gas and introducing a second gas having an oxygen gas in an amount of 20 vol. % or more and 100 vol. % or less and a rare gas. In the first heat treatment process, the silicon wafer is rapidly heated to first temperature of 1300° C. or higher and a melting point of silicon or lower at a first heating rate, and kept at the first temperature. In the second heat treatment process, the silicon wafer is kept at the first temperature, and rapidly cooled from the first temperature at a first cooling rate.

Semiconductor devices including a substrate (e.g., silicon substrate), a multi-layer structure disposed on a portion of the substrate, and at least one electrode disposed on the multi-layer structure and methods of manufacturing the same are provided. The multi-layer structure may include an active layer containing a Group III-V material and a current blocking layer disposed between the substrate and the active layer. The semiconductor device may further include a buffer layer disposed between the substrate and the active layer. In a case that the substrate is a p-type, the buffer layer may be an n-type material layer and the current blocking layer may be a p-type material layer. The current blocking layer may contain a Group III-V material. A mask layer having an opening may be disposed on the substrate so that the multi-layer structure may be disposed on the portion of the substrate exposed by the opening.

The invention discloses a method for manufacturing an LED epitaxial wafer, and the method sequentially comprises the steps: processing a substrate, growing a low-temperature GaN buffer layer, growing a non-doped GaN layer, growing a Si-doped n-type GaN layer, manufacturing a carrier transition layer, growing a multi-quantum well layer, growing an AlGaN electron blocking layer, growing a Mg-doped P-type GaN layer, and carrying out the cooling. Wherein the step of manufacturing the carrier transition layer sequentially comprises the steps of sputtering a molybdenum oxide layer, performing ozone treatment and manufacturing a nitrogen atom layer. According to the invention, the crystal quality of the quantum well is improved by adopting the new manufacturing method, so that the luminous efficiency of the LED is improved.

The invention discloses a graphite thermal-field single crystal growth device for preparing silicon carbide crystals, belonging to the technical field of silicon carbide single crystal preparation and crystal growth. The graphite thermal-field single crystal growth device comprises a sealing cavity, a heating structure, a heat preservation structure, a temperature adjusting structure, a crucible and a temperature measuring mechanism, wherein the heat preservation structure is arranged in the sealing cavity; the heating structure is arranged in the heat preservation structure; the temperature measuring mechanism is arranged on the sealing cavity; the temperature adjusting structure is arranged in the heat preservation structure, and a crucible and a seed crystal support are arranged in the heat preservation structure; the heating structure is used for heating the bottom and the top of the crucible and carrying out axial and radial temperature control on the crucible; the temperature measuring mechanism is used for respectively measuring the temperatures of the top and the bottom of the crucible; the heat preservation structure is used for carrying out heat preservation on a thermal field of the whole cavity, so heat loss of the crucible can be reduced, and accurate temperature control on each part of the crucible is realized; the temperature adjusting structure can reduce the radial temperature gradient of the crucible; and therefore, the radial temperature gradient and the stress gradient of the crystal in the growth process of the silicon carbide single crystal are reduced, the defects of crystal growth can be reduced, and the quality of the crystal is ensured.

The invention relates to the field of lithium batteries, and discloses a graphene modified-carbon coated lithium iron phosphate material and a preparation method thereof, and a solid lithium ion battery, the preparation method comprises the following steps: dissolving a phosphate radical raw material, an iron salt and a lithium source in an alcoholic solution, then adding a template agent, a carbon source and an antioxidant, then adding graphene oxide, and carrying out ultrasonic dispersion, so as to obtain the graphene modified-carbon coated lithium iron phosphate material. Pouring into a reaction kettle, and carrying out hydrothermal synthesis to obtain a solid-phase material; and placing the solid-phase material in a vacuum oven for drying, and then placing the dried solid-phase material in a muffle furnace for high-temperature calcination to obtain the graphene modified-carbon coated lithium iron phosphate material. When the G / LFP / C material is applied to a solid-state battery, the transportation of electrons and lithium ions can be facilitated, and the interface impedance is reduced, so that the solid-state battery prepared from the G / LFP / C material can have excellent rate capability, electrochemical lithium storage performance and cycle performance.

The invention provides a semiconductor crystal growth device. It includes: a furnace body; a crucible, which is arranged inside the furnace body, to accommodate silicon melt; a lifting device, which is arranged on the top of the furnace body, to extract silicon melt from the silicon melt Pull out the silicon crystal rod; the guide tube, the guide tube is barrel-shaped and arranged vertically above the silicon melt in the furnace body; the pulling device pulls the silicon The crystal rod passes through the guide tube in the vertical direction; and the magnetic field applying device is used to apply a horizontal magnetic field to the silicon melt in the crucible; wherein, the bottom of the guide tube is provided with There is a downward protruding step, so that the distance between the bottom of the draft tube and the silicon melt surface in the direction of the magnetic field is smaller than the distance between the silicon melt surface and the direction perpendicular to the magnetic field. distance between body fluid surfaces. According to the semiconductor crystal growth apparatus of the present invention, the quality of semiconductor crystal growth is improved.

The invention provides a preparation method of uniform-size spherical yttrium-stabilized zirconia nano powder. The method is characterized by comprising the following steps: making a zirconium source and a yttrium source into a solution; adding a precipitant into the solution; stirring sufficiently and adding a dispersing agent; putting the mixed solution into a reaction kettle; stirring at room temperature, and heating for reacting for a period of time to obtain a product; washing the product with water and ethanol; performing freeze drying to obtain semi-stable nano-scale yttrium-stabilized zirconium; and performing thermal stabilization treatment to obtain spherical yttrium-stabilized zirconia nano powder. The method provided by the invention has the following advantages: the prepared yttrium-stabilized zirconia nano powder is of uniform size distribution, spherical morphology and high crystallinity and exists stably in a tetragonal phase under a room-temperature condition.

The present invention provides a silicon carbide crystal growth method and device, the method comprising: (1) assembly stage: (2) sublimation stage: controlling a plurality of partitions to rotate between the plurality of partitions and the inner wall of the partition and the cavity There is no gap between them, the first crucible is separated from the second crucible, and the silicon carbide raw material is heated to sublimate; (3) Crystal growth stage: control multiple partitions to rotate between multiple partitions and / or the inner wall of the partition and the cavity There is a gap between them, and the second crucible communicates with the first crucible through the gap, and the heating makes the silicon carbide raw material atmosphere pass through the gap to the seed crystal for crystal growth. By controlling the rotation of multiple partitions, the first crucible is separated from the second crucible, and the sublimated atmosphere of the silicon carbide raw material cannot be transmitted upwards, so as to avoid the formation of defects affecting the crystal quality and damage and pollution to the seed crystal caused by the unstable atmosphere in the early stage of growth. And the separator blocks the heat radiation from the raw material to the seed crystal, avoiding the sublimation of the seed crystal surface caused by the lack of silicon carbide atmosphere supplement during impurity removal.