4results about How to "Reduce charging voltage" patented technology

The invention discloses a control system for lithium battery power management, and relates to the field of lithium battery control, and the system comprises a voltage input module which is used for externally connecting voltage and supplying power to a battery power supply module and a time delay module; the battery power supply module is used for charging the battery; receiving the battery voltage information, and adjusting the voltage output to the battery according to the battery voltage; the battery module is used for a battery to store electric energy; compared with the prior art, the system has the beneficial effects that the output voltage of the battery power supply module is adjusted through the feedback module, the output voltage of the battery power supply module is relatively large at the beginning, and the charging voltage is reduced along with the increase of the battery voltage, so that a quick charging effect is constructed; whether battery charging is abnormal or not is detected through the time delay module and the charging fault detection module, the battery power supply module is adjusted to perform constant-voltage charging when charging is abnormal, and the battery charging effect is guaranteed.

The present disclosure relates to a grid-connected starting method of an AC-DC conversion system, and the grid-connected starting method comprises: obtaining energy storage voltages of a plurality of energy storage circuits when the AC power grid charges the plurality of energy storage circuits; in the case that the voltage difference between any two energy storage voltages is greater than a difference threshold, short-circuiting at least part of the energy storage sub-modules to reduce the charging voltage of a target energy storage circuit until the voltage difference between any two energy storage voltages is less than the difference threshold; wherein the target energy storage circuit is at least one energy storage circuit with the largest energy storage voltage; the at least part of the energy storage sub-modules come from the target energy storage circuit; in the case that the plurality of energy storage voltages all meet the charging completion condition, controlling at least two AC-DC conversion circuits to be grid-connected. The present disclosure realizes dynamic voltage equalization of the plurality of energy storage circuits in the AC-DC conversion circuit during the charging process before the plurality of AC-DC conversion circuits are grid-connected.

The application discloses a kind of vehicle-mounted unmanned aerial vehicle charge-discharge management system and method, including the full-amount state parameter of acquisition unmanned aerial vehicle, hangar, power supply and environment, constructs system state vector, dynamically calculates charging trigger threshold and judges charging trigger condition, exports charging trigger signal or standby instruction or low-power value guard instruction;Construct reinforcement learning scheduling system and complete charging channel, power level, power supply type Dynamic decision, output optimal charging scheduling instruction;Precise regulation and control to charging voltage, charging current is realized through double closed loop artificial neural network, compensates wireless charging coupling coil offset, exports battery real-time operation data in charging process;Battery health status is analyzed, battery remaining useful life is predicted in combination with battery state parameter collected in whole process, dynamically adjusts charging trigger threshold and optimal charging scheduling instruction.

The application discloses a memory operation system compliant with DDR memory access timing, and belongs to the field of memory and scientific calculation, comprising: a row-level parallelism driven timing termination mechanism, which utilizes row nonlinear charging characteristics to reduce tail delay of tRCD and tRP; and a row block interleaving, row-column collaborative vector-matrix multiplication (VMM) access mechanism, which reduces tRAS and overlaps CL timing parameters without increasing peripheral column ADC precision overhead, and reduces cross-point RAM internal core delay; the proposed row access and column access collaborative optimization memory hardware design can enable VMM operation compliant with DDR memory access timing in a memory-centric manner, so as to realize efficient hardware execution of low-delay, high-bit-width data-intensive scientific calculation (computational physics) loads.