1results about How to "Reduce connection strength" patented technology

The present disclosure provides a semiconductor device manufacturing method. The semiconductor device manufacturing method comprises the following steps: providing a semiconductor substrate, then forming a capacitor structure above the semiconductor substrate, and forming an interlayer dielectric layer above the capacitor structure. The present disclosure processes the interlayer dielectric layer as follows: first processing the interlayer dielectric layer to form a plurality of columnar protrusions on the interlayer dielectric layer; second processing the interlayer dielectric layer to reduce the height of the columnar protrusions; and finally, chemically mechanically polishing the interlayer dielectric layer to make the upper surface of the interlayer dielectric layer flush, thereby achieving the effect that the upper surface of the interlayer dielectric layer is planarized. In the present disclosure, the first processing can be dry etching, and the second processing can be wet etching. Compared with the prior art, the technical solution provided by the present disclosure can effectively eliminate the step height difference between different positions on the device while protecting the interlayer dielectric layer that needs to be reserved.