3results about How to "Control Surface Roughness" patented technology

The present application relates to the technical field of laser force effect micro-nano manufacturing, and particularly relates to a laser impact micro-nano structure preparation method based on a water constraint layer micro-nano inclusion doping. The method comprises the following steps: performing smoothing treatment on a material to be processed, then sequentially arranging an absorption layer and a micro-nano inclusion doping constraint layer to obtain a flattened plate material; performing surface laser impact treatment on the flattened plate material, and the method is completed; wherein, the preparation method of the micro-nano inclusion doping constraint layer is as follows: according to the micro-nano structure processing size and density requirements, different particle sizes and densities of micro-nano inclusions are added to the constraint layer medium. The present application realizes quantitative control of the turbidity degree of the water constraint layer by changing the particle size and density of the impurities in the water constraint layer; the particle size and density of the impurity particles in the water constraint layer affect the size and density of the laser impact pits and protrusions, thereby achieving the purpose of laser impact micro-nano structure preparation.

The invention belongs to the technical field of indium phosphide chip treatment, and discloses an indium phosphide chip polishing corrosive liquid, an indium phosphide chip polishing method and an indium phosphide chip, the indium phosphide chip polishing corrosive liquid comprises hydrochloric acid and nitric acid, the mass concentration of the hydrochloric acid in the corrosive liquid is 0.16-0.38%, and the mass concentration of the nitric acid in the corrosive liquid is 0.16-0.35%. The invention discloses a corrosive liquid for polishing an indium phosphide chip, which is prepared by compounding hydrochloric acid and nitric acid with specific concentration, can effectively control the corrosion condition of the indium phosphide chip in the corrosion process, can effectively control the surface roughness of the indium phosphide chip, and improves the yield of products.

The circuit board includes a first insulating layer having a cavity, a second insulating layer disposed below the first insulating layer, and a third insulating layer disposed between the first insulating layer and the second insulating layer, wherein the light absorption rate of the third insulating layer is lower than the light absorption rate of the first insulating layer.