The invention relates to the technical field of
semiconductor device manufacturing, in particular to a preparation method of a high-
frequency response power
triode. Firstly, the resistivity gt is adopted; the method comprises the following steps: growing an N-drift layer on an N +
silicon substrate with the thickness of 1000
omega.cm,
etching an isolation groove with the depth of 12 microns and the depth-to-
width ratio of 5.9: 1 through ICP (
Inductively Coupled Plasma), and filling a SiO2 / Si3N4 composite
dielectric layer to expand a depletion layer to 18.5 microns, so that the
capacitance of a collector junction is reduced to 68pF and the
breakdown voltage reaches 205V. Secondly, forming an interdigital emitter on the front surface,
thinning the back surface to 100 + / -2 microns, then performing
laser drilling, filling through holes with
pulse electroplating copper, and compressing
loop inductance to 2.7 nH by a
copper column array; and finally, a Ti / Ni / Au
transition layer is sputtered,
a diamond-
copper composite substrate is subjected to
hot pressing bonding, a TiC phase of 80 nm is formed on an interface, the heat
conductivity reaches 635 W / m.K, and the
heat resistance is reduced to 0.61 K / W. According to the invention,
capacitance,
inductance and
thermal resistance are optimized, switching loss is reduced by 57.8%,
power density is increased to 51.2 W / cm < 2 >, and the device is suitable for a MHz-level high-frequency power
system.