Patents
Literature
Patsnap Copilot is an intelligent assistant for R&D personnel, combined with Patent DNA, to facilitate innovative research.
Patsnap Copilot

129results about How to "Reduce surface reflectivity" patented technology

Method for forming inverted-pyramid porous surface nanometer texture on polycrystalline silicon and method for manufacturing short-wave reinforcing solar cell

The invention discloses a method for forming an inverted-pyramid porous surface nanometer texture on polycrystalline silicon and a method for manufacturing a short-wave reinforcing solar cell. The method for forming the inverted-pyramid porous surface nanometer texture on the polycrystalline silicon and the method for manufacturing the short-wave reinforcing solar cell are suitable for the technical field of solar photovoltaic batteries. By means of a metal catalytic chemical corrosion method, a nanometer porous surface structure is formed on the polycrystalline silicon through HF, AgNO3, H2O2, HNO3 and other solutions, then partial samples are placed in a NaOH corrosive liquid with the concentration of 0.1-1% for surface modification of a nanometer inverted pyramid, a nanometer inverted pyramid silicon structure is formed, and the micro structure appearance of the nanometer inverted pyramid silicon structure is even and smooth, so that service life of a few effective charge carriers is greatly prolonged, and ultimately, in the nanometer texture surface structure, by means of changes of the thickness of a silicon nitride layer in the solar cell manufacturing process, a nanometer inverted pyramid silicon solar photovoltaic cell which is low in surface reflection rate and high in short wave spectrum response is prepared. The method for forming the inverted-pyramid porous surface nanometer texture on the polycrystalline silicon and the method for manufacturing the short-wave reinforcing solar cell are simple in process, convenient to operate, low in cost and suitable for industrial production.
Owner:SHANGHAI UNIV

Preparation method of polycrystalline black silicon of micro-nano composite suede structure

The invention discloses a preparation method of polycrystalline black silicon of a micro-nano composite suede structure. The method comprises the following steps: imbedding polycrystalline silicon chips into etchant solution to obtain polycrystalline silicon chips with micro-meter suede structures; transferring the polycrystalline silicon chips with the micro-meter suede structures into a metal ion compound solution to deposit metal nanoparticles on the micro-meter suede; transferring into an etching solution to etch so as to obtain the polycrystalline silicon chips with the micro-nano composite suede structures; washing to remove metal particles residual on the surface; feeding into an alkaline solution to modify and etch the micro-nano composite suede structure; then drying to obtain the product. According to the method, the wet chemical etching method is carried out to prepare the micro-nano composite suede structure on the surface of the polycrystalline black silicone; such structure is extremely low in reflectivity; meanwhile, the preparation method is highly compatible with the general polycrystalline silicon suede preparation process; therefore, the preparation method can be quickly applied to the current general polycrystalline black silicon solar cell industry; the light absorbing efficiency can be obviously raised, and as a result, the efficiency of a solar cell is increased.
Owner:48TH RES INST OF CHINA ELECTRONICS TECH GROUP CORP

Process for texturing crystalline silicon solar cell by dry etching

The invention relates to a process for texturing a crystalline silicon solar cell by dry etching, belonging to the technical filed of the solar cell texturing. The process for texturing the crystalline silicon solar cell by dry etching comprises the following steps of pre-processing the surface of a silicon wafer, preparing a layer of nano masking film on the surface of the silicon wafer, carrying out the reactive ion etching (RIE) for the silicon wafer with the nano masking film, removing the residues on the surface of the silicon wafer and texturing the surface of the silicon wafer. After the surface of the silicon wafer is textured, the reflectivity of the surface of the silicon wafer can be reduced to less than 2 percent, and the light absorption rate can be improved. Compared with the traditional technology for texturing the crystalline silicon solar cell by wet chemical etching, the process for texturing the crystalline silicon solar cell by dry etching can ensure that crystalline silicon solar cell has higher photoelectric conversion efficiency and can reduce the environmental pollution caused by texturing the crystalline silicon solar cell and is suitable for the industrial production of the crystalline silicon solar cell.
Owner:山东力诺太阳能电力股份有限公司

Measuring system for expansion coefficient of material

The invention relates to a measuring system for the expansion coefficient of a material. The measuring system is characterized by comprising two solid microchip laser feedback interferometer optical systems and an electrical logging and electric control system, wherein a heating furnace is arranged between the two solid microchip laser feedback interferometer optical systems and comprises a furnace chamber; a cavity is formed in the furnace chamber; a perforating hole is symmetrically formed in the two opposite sides of the cavity outward respectively; a perforating hole packaging structure is fixedly arranged at the outer end part of each perforating hole; a window plate is fixed outside each perforating hole packaging structure through a window plate clamping seat; a sample table device capable of accommodating a sample to be measured is further arranged in the cavity body; a heating element and a temperature sensor are fixedly arranged on the inner wall of the furnace chamber in a suspended mode. The measuring system for coefficient of liner expansion has the advantages of complete non-contact, high precision, large temperature measuring range and high resistance to shock, and is particularly suitable for a relatively low surface reflecting material. The measuring system can be widely applied to large temperature range and high precision measurement of expansion coefficient of various materials.
Owner:TSINGHUA UNIV

Method for removing surface line marks of diamond linear cutting polycrystalline silicon chip through wet method

The invention discloses a method for removing cutting marks generated at the back surface of diamond linear cutting polycrystalline silicon. The method comprises the following steps: 1, pre-cleaning a silicon chip; 2, placing the cleaned silicon chip in an HF/HNO3/H2O mixed solution for texturing processing; 3, placing the textured silicon chip in a mixed solution of H2O2/HF/AgNO3/Cu(NO3)2 and ultrapure water for corrosion so as to prepare a nanometer structure; and 4, performing expansion processing on the nanometer structure by use of a nanometer reconstruction solution, and performing anisotropic corrosion so as to remove the cutting marks at the surface of the polycrystalline silicon. According to the invention, on the basis that a black silicon anti-reflection structure is prepared based on MACE (metal-assisted chemical etching), the cutting marks at the surface of the diamond linear cutting polycrystalline silicon chip by use of anisotropy in a corrosion process, at the same time, the reflectivity of the surface of the silicon chip is also greatly reduced, and the method has important application potential in future preparation of low-cost high-conversion-efficiency diamond linear cutting polycrystalline silicon solar batteries.
Owner:NANJING UNIV OF AERONAUTICS & ASTRONAUTICS

Selective emitter electrode black silicon double-face PERC crystalline silica solar energy battery manufacturing method

The invention relates to a selective emitter electrode black silicon double-face PERC crystalline silica solar energy battery manufacturing method featured by comprising the following steps: 1, usinga metal catalysis chemical etching method to prepare a black silicon flock on the front side and backside of a silicon chip; 2, carrying out high temperature phosphorus diffusion for the silicon chipso as to form PN nodes; 3, removing a silicon chip front side phosphor silica glass and PN nodes on the backside and edges after diffusion; 4, depositing an alumina / silicon nitride lamination passivation film on the backside of the silicon chip, and depositing a silicon nitride anti-reflection film on the front side of the silicon chip; 5, using a laser to route on the backside of the silicon chipso as to obtain a routing groove; 6, spraying or rotating coating a phosphor acid solution on the front side of the silicon chip; 7, using the laser to make laser doping on the front side of the silicon chip so as to obtain a main grid line and auxiliary grid line pattern region; 8, simultaneously electroplating the front side and backside of the silicon chip; 9, annealing. The method can reducethe surface reflectivity, and can improve the black silicon battery transition efficiency, thus reducing the making costs.
Owner:WUXI SUNTECH POWER CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products