37results about How to "Easy Process Compatibility" patented technology

The invention discloses a backside illuminated Si-PIN photoelectric detector and a preparation method thereof and relates to a photoelectric detector structure in the technical field of photoelectric detection. The photoelectric detector comprises an I-type substrate 1, an area P 2, areas P+ 3, a nano structure silicon layer area N 4 and an upper end and lower end electrodes; the electrode comprises the upper end electrode 5 positioned on the area P 2 and the areas P+3, and the lower end electrodes 6 positioned on the nano structure silicon layer area N 4, wherein the upper end electrode 5 is used for being connected with the negative electrode of an external circuit, and the lower end electrodes 6 are used for being connected with the positive electrode of the external circuit. The novel Si photoelectric detector solves the problem that a traditional Si photoelectric detector is relatively low in responsitivity and cannot respond to the near infrared wave band, improves the absorption rate to visible light and near infrared light, has the responding wave band expanded to the near infrared wave band, and is higher in responsitivity.

This invention provides a micro-silicon microphone and its preparation method, in which, said microphone includes a monocrystal silicon film and polysilicon film as the capacitor pole plates, the polysilicon film is a movable pole plate, several release holes are set on the monosilicon film and rib reinforcement structures are formed on the polysilicon film, the rib reinforcement structure is corresponding to the release hole on the monocrystal silicon film and inlayed in the release holes. The preparation method utilizes ICP technology to carry out deep bar etching to either get the release holes or realize polysilicon films with the rib reinforcement structure.

The invention discloses an MEMS infrared light source and a manufacturing method thereof. The MEMS infrared light source comprises a substrate, a supporting layer, a first thermistor layer, a dielectric layer, a second thermistor layer, an isolation and protection layer, a heating resistance layer and a radiation layer. In the MEMS infrared light source disclosed by the invention, one thermistor layer in the first thermistor layer and the second thermistor layer is used as a temperature sensor to directly measure the temperature change of a radiation area of the MEMS infrared light source through the resistance change of the thermistor layer at the outside; the other thermistor layer is used as temperature compensation performance to counteract the error generated by temperature excursion in a peripheral compensation circuit within a certain temperature range, namely the MEMS infrared light source provided by the invention can perform real-time temperature compensation while monitoring the temperature offset in real time, thereby improving the measurement linearity of the MEMS infrared light source and avoiding the influence by the external environment. The manufacturing method is convenient to be compatible with an internal chip process of the infrared light source, and the process difficulty is reduced.

The present invention discloses a right side illuminated Si-PIN photoelectric detector taking the micro-nano structural silicone as a light-sensitive layer and a preparation method thereof. The right side illuminated Si-PIN photoelectric detector taking the micro-nano structural silicone as the light-sensitive layer comprises an I-type substrate, an N area located under the I-type substrate, a micro-nano structural layer P area located in the center of the upper part of the I-type substrate, P+ areas located at the two sides of the upper part of the I-type substrate, upper-end electrodes located on the upper surface of the I-type substrate and a lower-end electrode located on the lower surface of an N area. Compared with the conventional Si photoelectric detector, the right side illuminated Si-PIN photoelectric detector taking the micro-nano structural silicone as the light-sensitive layer of the present invention has a higher responsivity, also can detect the near infrared light, is simple in preparation technology, and is compatible with a conventional silicon semiconductor technology.

The invention discloses a piezoelectric integrated MOEMS scanning raster micromirror and relates to the field of spectrum analysis and micro optical electro mechanical systems. The piezoelectric integrated MOEMS scanning raster micromirror consists of an integrated scanning raster micromirror, a torsion beam, a connecting beam, an angle sensor, a piezoelectric micro driver and a fixing frame. The integrated scanning raster micromirror is based on monotectic orientation (111) silicon substrate, a blazed grating is integrated on the front side, a groove is sapped in the back side, and the diffraction efficiency and device robustness are improved. For achieving large-angle scanning under low-drive voltage, the piezoelectric micro driver and the connecting beam are adopted to amplify drive displacement. For monitoring the motion state of the integrated scanning raster micromirror in real time, the piezoelectric angle sensor is integrally integrated on the connecting beam. The piezoelectric integrated MOEMS scanning raster micromirror is novel and simple in structure and compatible with an integration process, the diffraction efficiency, resolution ratio, robustness and integration level of the scanning raster micromirror can be remarkably improved, and the driving and angle sensing properties of the scanning raster micromirror are improved.

The invention belongs to the technical field of power semiconductors, and relates to a short circuit anode SOI LIGBT having alternate NP voltage withstand buffer layer structures. Compared with the conventional short circuit anode LIGBT, alternately distributed N-type island regions and P-type island regions are introduced to an anode region without high concentration field stop layer. The P-type island regions are completely exhausted in forward blocking, and the incompletely exhausted N-type island regions have the field stop effect. The device is affected by electron barrier blocking of the P-type island regions under unipolar mode conduction, and electron current in a drift region flows through the N-type island regions and a high resistance drift region between the island regions and the anode structure and is finally collected by the N+ anode. The beneficial effects of the short circuit anode SOI LIGBT are that the short circuit anode SOI LIGBT has faster disconnection speed and lower loss in comparison with the conventional LIGBT and eliminates the voltage return phenomenon under the smaller size of longitudinal cells in comparison with the conventional short circuit anode LIGBT having the continuous field stop layer.

The invention provides a bipolar resistive random access memory and a preparation method thereof. The bipolar resistive random access memory includes a substrate, a lower electrode which is composited with the upper surface of the substrate, a rectification function layer which is composited with the lower electrode, a graphene layer which is composited with the rectification function layer, a resistive dielectric layer which is composited with the graphene layer, and an upper electrode which is composited with the resistive dielectric layer, wherein the rectification function layer is formed by one or more of Al203, TiO2 and MgO. Compared with the prior art, the rectification function layer in the bipolar resistive random access memory can play a role in tunneling rectification and realize bidirectional rectification, and can also effectively restrain the crosstalk misreading phenomenon between adjacent units in a resistive random access memory array; and at the same time, because of existence of the graphene layer, the device performance is improved; the reset current is reduced; the response speed is improved; and the power consumption is reduced.

The invention belongs to the technical field of power semiconductor, and specifically relates to a thin SOI short circuit anode LIGBT (Lateral Insulated Gate Bipolar Transistor). Compared with a traditional SOI base LIGBT, the thin SOI short circuit anode LIGBT is characterized in that an N+ anode region which is in parallel with a P+ anode region in the vertical direction, and introducing disjunctively distributed N type islands at one side, approaching a cathode structure, in the P+ anode region (9) and the N+ anode region (10); when a new device in the blockout state, the N type islands are not completely depleted, thus effectively preventing further expansion of a depletion region and preventing break-through and breakdown of the N type islands; when the initial stage is started, an electro current flows by the N type islands and the high resistance drift regions among the adjacent N type islands; and compared with traditional continuous N buffer layers, the disjunctively distributed N type islands can increase the distribution resistance at one side of the anode side to enable the device to enter the bipolar mode under a smaller current. Compared with a traditional LIGBT, the thin SOI short circuit anode LIGBT has the advantages of high speed and low on-off loss. Compared with a traditional short circuit anode LIGBT, the thin SOI short circuit anode LIGBT can eliminate the snapback effect even under a small cell size.

The invention provides a method for generating skyrmion in a magnetic multilayer film through current induction, and the method comprises the following steps: S1, providing a magnetic multilayer filmwhich comprises a first magnetic layer, a non-magnetic metal layer and a second magnetic layer which are sequentially stacked, wherein more than one antiferromagnetic coupled first strip and more thanone ferromagnetic coupled second strip are formed in the magnetic multilayer film, and the first strips and the second strips are alternately formed; the first strip and the second strip are parallelto each other along a first direction; S2, connecting the magnetic multilayer film into a circuit, and introducing alternating current to generate the skyrmion at the junction of the first strip andthe second strip, wherein the frequency of the alternating current is 47 kHz and 52 kHz, and the peak value of the alternating current is 37 mA-39mA. The method can be used for preparing a device withhigh integration level, and is also convenient to be compatible with the existing semiconductor process.

The invention provides an athermal arrayed waveguide grating. In arrayed waveguides, the adjacent arrayed waveguides have different waveguide lengths, the corresponding adjacent arrayed waveguides have different waveguide widths, and the waveguide widths of the arrayed waveguides are reduced along with the increase of the waveguide lengths of the arrayed waveguides. By changing the waveguide widths of the arrayed waveguides, athermalization of the arrayed waveguide grating is achieved. Good temperature stability can be maintained without external energy supply. The arrayed waveguide grating isa passive device, and the maintenance cost of the system can be greatly reduced. The design and the process are simple, a post-treatment process is not needed, the grating can adapt to large-scale mass production and commercialization, and the performance is stable; good process compatibility is achieved, and standard CMOS processing can be adopted; and multi-channel wavelength division multiplexing can be realized. According to the athermal arrayed waveguide grating, on the premise that the optical path difference of the adjacent arrayed waveguides is fixed on the whole, insensitivity of thecentral wavelength to temperature can be achieved.

The invention belongs to the technical field of magneto-optic devices, in particular to an all-solid-state electric field reconfigurable magneto-optic device. An all-solid-state structure is adopted,so that the structure is compatible with a semiconductor technology more easily; an electric field is utilized to manipulate the magneto-optic effect of magnetic film in a nonvolatile mode, and staticpower dissipation of the device is lowered; through the uniformity of ionic migration of an adjustable material layer, consistent manipulation of the magneto-optic effect within the range of severalhundred micron scales is achieved, and the problem that it is hard to scale down filament machine-made devices based on ionic conduction in equal proportion is solved; the adjustable material layer and a magnetic dielectric layer which are separated are adopted, and the purpose that the electric field manipulates the magneto-optic effect of a wide class of magnetic insulators or semiconductors isachieved. According to the all-solid-state electric field reconfigurable magneto-optic device, regarding one device, it is achieved that the structure is in an all solid state, the electric field manipulates the magneto-optic effect in a nonvolatile mode, the magneto-optic effect of the magnetic film is manipulated on a large scale and the magneto-optic effect of multiple magnetic insulators or semiconductors is manipulated in a generalization mode.

The invention discloses a self-assembly preparation method for a floating gate layer of a silicon nitride dielectric film with embedded metal tungsten quantum dots. According to the invention, at a room temperature, a magnetron sputtering method is adopted to prepare the silicon nitride dielectric film with the embedded metal tungsten quantum dots, and the film serves as a floating gate structure of a non-volatile memory; a sputtering target material is formed by small metal tungsten blocks on a silicon nitride target material, and the nano-scale metal tungsten quantum dots, which are uniformly distributed on the silicon nitride dielectric film, can be obtained through cosputtering at the room temperature; and the size and density of the metal tungsten quantum dots can be adjusted through adjusting the amount of the small metal blocks, namely by adjusting the coverage rate of the small metal blocks to the silicon nitride target material. The high-density metal tungsten quantum dots prepared by the invention have favorable thermal stability at the high temperature of 800 DEG C and are easy to compatible with a CMOS (Complementary Metal Oxide Semiconductor) technology. The silicon nitride dielectric film with embedded high-density metal tungsten quantum dots serves as the floating gate layer of the non-volatile memory and has good charge storage characteristics.