38results about How to "Reduced Auger Recombination" patented technology

The invention discloses a wet method etching process for crystal silicon wafers, which mainly comprises a back side polishing process. After etching and edge removing, the polishing process performed to the back sides of the crystal silicon wafers through a polishing solution is added, the temperature of the polishing solution in polishing is 5-30 DEG C, the polishing time is 10 seconds to 10 minutes, and the polishing solution contains, by mass, 0.5%-10% of HF, 35%-55% of HNO, 45%-55% of H2SO4 and 5%-30% of acetic acid. By adding the back side polishing process, the back sides of the silicon wafers can be smooth, back reflection of the silicon wafers is strengthened, and absorption of long-wave band spectrums in sunlight is enhanced, thereby improving light energy conversion and short-circuit current (Isc) of a battery and finally improving the conversion efficiency of the battery. In addition, the back of the smooth battery further facilitates combination of follow-up aluminum-silicon alloy and a silicon body, improves ohmic contact, strengthens the light reflection effect of an interface, improves variable output circuit (Voc), and finally improves the conversion efficiency of the battery.

The invention discloses an oxide-metal multilayer film back contact crystalline silicon solar cell, which comprises a crystalline silicon wafer, wherein passivation layers are arranged on the front surface and the back surface of the crystalline silicon wafer; the passivation layer on the back surface is provided with an emitter, an emitter metal electrode and a base metal electrode; the emitter comprises a first oxide thin film, a metal film and a second oxide thin film; the first oxide thin film or the second oxide thin film is a WO3 thin film, an NiO thin film or a V2O5 thin film; and the metal thin film is an Ag thin film, an Au thin film, a Pd thin film, a Cu thin film, an Ni thin film, an Mo thin film, a W thin film or an Al thin film. The surface of the cell is not shielded by a metal grid line; the raw materials do not include inflammable, explosive or toxic materials and are friendly to environment; expensive devices of a photoetching device, a laser device and the like and a complicated technological process are not needed in the overall preparation process; and the crystalline silicon solar cell disclosed by the invention is free of a high temperature, simple in processing step and suitable for large-scale production, does not need to use a transparent conductive thin film, is low in cost and has a wide application prospect.

The invention discloses a low-roll-off quasi-two-dimensional perovskite light-emitting diode and a preparation method thereof. The low-roll-off quasi-two-dimensional perovskite light-emitting diode issequentially provided with a cathode, a hole transport layer, a hole transport layer and light-emitting layer interface modification layer, a perovskite light-emitting layer, a light-emitting layer and electron transport interface modification layer, an electron transport layer, an electron injection layer and an anode from bottom to top. By modifying the interface of the hole transport layer andthe perovskite light-emitting layer, the hole injection barrier between the hole layer and the light-emitting layer is reduced, the hole injection efficiency is improved, the hole layer can be prevented from quenching the perovskite layer, and the light-emitting efficiency of the perovskite layer is improved. The interface of the perovskite light-emitting layer and the electron transport layer isalso modified, so that the defect state of the perovskite surface can be passivated, the film quality of the light-emitting layer is improved, non-radiative recombination is inhibited, and the light-emitting efficiency of the device is further improved.

A light emitting device includes a substrate including gallium nitride, and a semiconductor layer disposed on the substrate, the semiconductor layer including an n-type nitride semiconductor layer, an active layer disposed on the n-type nitride semiconductor layer, and a p-type nitride semiconductor layer disposed on the active layer, in which an angle defined between a crystal growth plane of the substrate and an m-plane thereof is in a range of 3.5° to 6.

The invention discloses a diffusion method of a crystal wafer, which comprises the following steps that (1) the crystal wafer is made into wool and cleaned; (2) constant source diffusion is carried out, the atmosphere in a furnace comprises nitrogen, oxygen and pure nitrogen which carry diffusion sources, and the flow of the nitrogen, the oxygen and the pure nitrogen which carry the diffusion sources remains unchanged during a diffusion process; (3) impurity glass is removed, and cleaning is carried out; (4) limited source diffusion is carried out, only the nitrogen and the oxygen are fed in during the diffusion process, and the flow of the nitrogen and the oxygen remains unchanged; (5) diffusion is over, and the wafer is taken out; the surface doping concentration of the wafer is 1*1020atom/cm<3> to 5*1020atom/cm<3>; and the depth of a PN junction is 0.5mum to 1mum. According to the diffusion method, the 'dead-layer' effect caused by high surface doping concentration is effectively reduced, the auger recombination of surface photon-generated carrier is reduced, and the minority carrier lifetime is prolonged.

An electron barrier film for a quantum dot light-emitting diode, the electron barrier film includes: a compound with a general formula R¹—Si(OR²)₃; or a raw material for forming the electron barrier film includes a compound with the general formula R¹—Si(OR²)₃ one in a group. Not only can a rate of injecting electrons into the luminescent layer be adjusted, so that the number of electron holes in the quantum dot luminescent layer can be equal to the number of electrons in the quantum dot luminescent layer, and a recombination efficiency of the electrons and the electron holes in the luminescent layer is improved, a better interface modification effect can also be achieved, and a surface roughness of the quantum dot luminescent layer is reduced, so that an overall performance of the quantum dot light-emitting diode is more stable.

The invention belongs to the technical field of solar cells, and relates to a preparation method of a selective doping structure of a solar cell; the method comprises the following steps: step 1, pretreating the surface of a silicon wafer, and depositing a poly layer containing a doping source on the surface of the pretreated silicon wafer; step 2, carrying out laser processing on a part of the surface of the poly layer to form a heavily doped region; step 3, annealing the silicon wafer to form a lightly doped region in a non-laser-treated region on the surface of the poly layer, and introducing O2-containing gas in the annealing treatment process to oxidize the poly layer into a BSG/PSG layer; and step 4, cleaning the silicon wafer to remove the BSG/PSG layer so as to obtain the selective doping structure of the solar cell. According to the preparation method, the doping amounts of the lightly doped region and the heavily doped region of the selective doping structure can be accurately controlled, the preparation process and structure can be simplified, and the preparation efficiency is improved.

The present invention provides an LED and the manufacturing method thereof, and a light emitting device. The LED includes a first electrode, for connecting the LED to a negative electrode of a power supply; a substrate, located on the first electrode; and an LED die, located on the substrate; in which a plurality of contact holes are formed extending through the substrate, the diameter of upper parts of the contact holes is less than the diameter of lower parts of the contact holes, and the contact holes are filled with electrode plugs connecting the first electrode to the LED die. The light emitting device includes the LED, and further includes a susceptor and an LED mounted on the susceptor. The manufacturing method includes: forming successively an LED die and a second electrode on a substrate; patterning a backsurface of the substrate to form inverted trapezoidal contact holes which expose the LED die; and filling the contact holes with conductive material till the backface of the substrate is covered by the conductive material. The LED has a high luminous efficiency and the manufacturing method is easy to implement.

The invention provides a method for preparing a passivation contact structure based on low pressure chemical vapor deposition (LPCVD) secondary ion injection. The problem encountered when a heavily-doped polysilicon layer is prepared through a tubular LPCVD ion injection method can be well solved, namely, the problem that the number of ions diffused to penetrate through a tunneling oxide layer isincreased when the surface ion concentration is improved at the same time can be solved, the surface ion concentration of polysilicon can be improved, the electrical conductivity is improved, and thecontact resistance is reduced, so that cell fill factors are improved; the number of the ions diffused to penetrate through the tunneling oxide layer is reduced, the auger recombination is reduced, apassivation effect of the structure is improved, and the open-circuit voltage and the short-circuit current are improved; and the technological process is mature and can be accomplished by adopting anexisting equipment secondary process.

The invention is suitable for the technical field of solar cells, and provides a solar cell and a cell module, and the solar cell comprises a silicon substrate, a first doped region and a first conductive layer which are sequentially disposed on the front surface of the silicon substrate, and a back passivation contact structure and a second conductive layer which are sequentially disposed on the back surface of the silicon substrate. Multiple first doped regions are mutually spaced, the doping polarity of the first doped regions is the same with the polarity of the silicon substrate, the first conductive layer is in electric contact with the first doped regions, and the second conductive layer is in electric contact with the back passivation contact structure. Thus, due to the fact that the first doped regions with the same polarity as the silicon substrate are locally designed, most carriers can be transmitted to the first doped regions through the body region of the silicon substrate, the first doped regions do not need to make contact with the whole surface of the silicon substrate, and auger recombination or parasitic absorption can be reduced. Meanwhile, the body region of the silicon substrate can transport carriers more sufficiently.