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13 results about "Cmos compatible" patented technology

CMOS compatible high-density tactile sensor array and preparation method thereof

The invention relates to the technical field of tactile sensors, in particular to a CMOS (complementary metal oxide semiconductor) compatible high-density tactile sensor array and a preparation method thereof, and the CMOS compatible high-density tactile sensor array comprises a micro / nano structure pressure sensitive film which comprises a conductive network and an elastic polymer substrate and is used for generating a deformation signal and a current change signal; the CMOS readout integrated circuit is electrically connected with the micro / nano structure pressure sensitive film, the pixel array of the CMOS readout integrated circuit is 640 * 512, the pixel size is 15 * 15 [mu] m, and each pixel comprises a central pixel electrode and a surrounding grounding grid and is used for collecting / measuring the resistance change of the micro / nano structure pressure sensitive film; the signal processing circuit is electrically connected with the CMOS readout integrated circuit and used for processing the tactile signal data, and the problems that in the prior art, the resolution ratio is limited, sensitivity is insufficient, and the integration degree is low are solved.
Owner:WESTLAKE UNIV

Systems and methods for porous tool

PendingUS20260215203A1Electrolytic agentWafer
A porous tool for porosifying a wafer includes an electrolytic cell a housing, a voltage source, and a controller The electrolytic cell includes a cathode an anode, and an electrolyte A diameter of the wafer is at least 200 mm. The housing encloses the electrolytic cell and is configured to receive the wafer for a porosification process. The housing includes a seal, an input line and an output line The controller is coupled to the housing and the voltage source. The controller is configured to control the porosification process of the wafer. Advantageously the porous tool can provide dry-in and dry-out full-scale (e.g., at least 200 mm diameter) wafer porosification, programmable wafer porosification, a closed cleanroom compatible processing environment, epitaxy and CMOS compatible processing, and automated large volume cassette-to-cassette processing.
Owner:IQE

Large area / wafer level CMOS compatible two-dimensional material intercalation doping tools, processes, and methods including synthetic graphene doping

An intercalation doping apparatus includes: a reaction chamber in which a single or a plurality of wafers or substrates (SoMDoSubs) are disposed, in which the SoMDoSubs have a diameter or a distance between both sides of 25 mm to 450 mm; a heater, where the heater is configured to provide heat to SoMDoSubs disposed within the reaction chamber, where the SoMDoSubs include a temperature of 25 DEG C to 500 DEG C; wherein the pressure applied to at least one surface of SoMWorSubs disposed within the reaction chamber is in the range of 2 bar to 500 bar; and a dopant application device, where the dopant application device includes at least a valve and a pipe that bring a dopant from the outside into the reaction chamber, and includes at least a dopant crucible disposed within the reaction chamber, where the dopant includes a solid, liquid or gas phase material, and where the dopant includes an intercalation dopant.
Owner:DESTINATION 2D INC

Cmos-compatible graphene structures, interconnects, and methods of fabrication

PendingCN122373787ACMOSPtru catalyst
The invention relates to CMOS compatible graphene structures, interconnects and methods of manufacture. MLG (multi-layer graphene) device layer structures are connected with vias. The structure includes an M1 MLG interconnect device layer on a dielectric layer. An interlayer dielectric separates the M1 MLG interconnect device layer. An M2 MLG interconnect device layer is on the interlayer dielectric. A metal via penetrates the M2 MLG interconnect device layer, the interlayer dielectric and the M1 MLG interconnect device layer and forms an edge contact through the thickness of the M1 MLG and M2 MLG layers. A method of forming MLG layers by diffusion of carbon from a solid phase graphene precursor through a catalyst layer to deposit MLG on a dielectric or metal layer via application of mechanical pressure at a diffusion temperature.
Owner:RGT UNIV OF CALIFORNIA

High-sensitivity integrated full-Stokes polarization detector and preparation method thereof

The invention relates to the technical field of photoelectric detectors and integrated optoelectronic chips, and discloses a high-sensitivity integrated full-Stokes polarization detector and a preparation method thereof. The high-sensitivity integrated full-Stokes polarization detector sequentially comprises a titanium oxide metasurface polarization selection layer, an ITO transparent electrode layer, an upper electrode layer, a silicon-based NPN bipolar phototransistor detection unit, a filling layer, a silicon substrate layer and a lower electrode layer from top to bottom. The titanium oxide metasurface polarization selection layer comprises a plurality of metasurface units constructed by all-dielectric high-refractive-index titanium oxide; the titanium oxide metasurface polarization selection layer and the silicon-based NPN bipolar photoelectric transistor detection unit are integrated in a monolithic mode through the CMOS compatible technology, and each metasurface pixel in the titanium oxide metasurface polarization selection layer corresponds to each detection pixel in the silicon-based NPN bipolar photoelectric transistor detection unit in a one-to-one mode on the plane. Through the titanium oxide metasurface structure, the accuracy and sensitivity of Stokes parameter detection are improved.
Owner:SHANGHAI UNIV

CMOS compatible BioFET

The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.
Owner:TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

CMOS compatible near-infrared sensor system

A surface plasmon-based photodetector includes: a silicon substrate; a grating in contact with a surface of the silicon substrate, in which the grating forms a Schottky diode with the semiconductor substrate; and a complementary-metal-oxide-semiconductor (CMOS) sample and hold stage as well as an analog-to-digital circuit (ADC) in the silicon substrate and arranged to detect electrical current generated at the Schottky diode.
Owner:AMS INTERNATIONAL AG

CMOS (complementary metal oxide semiconductor) compatible biosensor based on aluminum nitride as well as preparation method and application of CMOS compatible biosensor

The invention discloses a CMOS compatible biosensor based on aluminum nitride and a preparation method and application thereof, specifically, aluminum nitride is adopted as a piezoelectric layer and is deposited on the surface of a silicon substrate to serve as an integration foundation, a deposition mode compatible with a CMOS technology is adopted, an AlN / Si substrate is obtained, a biosensor based on graphene is integrated on the substrate, and the biosensor based on the graphene is obtained. Wherein a biological recognition element is fixed on the graphene layer and is used for being combined with a target biological molecule to generate a reaction product with electron donating and receiving capability, so that the reaction product with the electron donating and receiving capability is subjected to charge transfer on the reduced graphene oxide layer, and aluminum nitride and the silicon substrate are combined for use; extensible wafer level MEMS process manufacturing of the sensing chip is achieved, a sensing device is directly connected to a CMOS circuit on a silicon substrate, the microelectronic process requirement is met, the preparation compatible with the CMOS process enables the sensor to be integrated with a signal amplification circuit, a signal processing circuit, a signal communication circuit and the like in the same chip, and therefore remote monitoring, analysis and closed-loop health management are achieved.
Owner:NATIONAL NANOTECH INNOVATION CENTER

CMOS compatible biosensor based on two-dimensional semiconductor and preparation method and application thereof

The invention discloses a CMOS compatible biosensor based on a two-dimensional semiconductor and a preparation method and application of the CMOS compatible biosensor, specifically, an aluminum nitride layer compatible with a CMOS process is deposited on a silicon substrate, a two-dimensional semiconductor layer is formed on the surface of the aluminum nitride layer to serve as a sensing layer, and meanwhile a biological recognition element is fixed. The two-dimensional semiconductor layer is used for being combined with target biomolecules to generate a reaction product with electron donating and receiving capability, so that the reaction product is subjected to efficient charge transfer on the two-dimensional semiconductor layer, and the conductive detection layer can output sensitive and controllable signal change; the band gap characteristic and the high surface area of the two-dimensional semiconductor are utilized, the aluminum nitride and the silicon substrate are combined for use to achieve CMOS compatibility of the biosensing device, and due to the fact that the two-dimensional semiconductor has the excellent optical absorption and emission characteristics, the biosensing device can also be expanded to optical biosensing, optical biosensing and the like. Coupling detection of photoelectric signals and chemical or biological events is achieved, and the application range and multifunctionality are further expanded.
Owner:NATIONAL NANOTECH INNOVATION CENTER

Wafer level vacuum packaging (WLVP) of thermal imaging sensor

A complementary metal oxide semiconductor (CMOS) device embedded with microelectromechanical system (MEMS) components in a MEMS region. The MEMS components, for example, are infrared (IR) thermosensors. The device is encapsulated with a CMOS compatible IR transparent cap to hermetically seal the device using wafer-level vacuum packaging techniques.
Owner:MERIDIAN INNOVATION PTE LTD

Device having a metamaterial-based focusing annulus lens above a MEMS component and method of manufacturing thereof

A complementary metal oxide semiconductor (CMOS) device embedded with microelectromechanical system (MEMS) components in a MEMS region. The MEMS components, for example, are infrared (IR) thermosensors. The device is encapsulated with a CMOS compatible IR transparent cap to hermetically seal the device using wafer-level vacuum packaging techniques. The cap includes an integrated focusing system with a metalens module for focusing IR radiation onto the sensors.
Owner:MERIDIAN INNOVATION PTE LTD

Heterojunction integrated ultra-wideband tunable semiconductor laser

The invention provides a heterojunction integrated ultra-wideband tunable semiconductor laser, which comprises an III-V / Si heterojunction gain module, a DBR-micro-ring composite tuning module, a phase control module, a bus waveguide, an adjustable coupler module and an output module which are integrated on a CMOS compatible silicon photon chip, and all the modules act synergistically, so that high-efficiency excitation of wide-spectrum gain is ensured, and high-efficiency excitation of the wide-spectrum gain is realized. And accurate wavelength tuning and stable laser output are realized, and core light source support is provided for the fields of ultra-wideband optical communication, high-precision optical sensing and the like. According to the invention, ultra-wideband wavelength tuning (covering an S band, a C band and an L band) can be realized, the integration level is high, the power consumption is low, the stability is high, and the method is suitable for the fields of ultra-wideband wavelength division multiplexing transmission, frequency modulation continuous wave laser radar, distributed optical fiber sensing, medical wearable equipment and the like.
Owner:雄安创新研究院

A multi-layer nonlinear optical neural network computing system based on linear signal recoding

The application discloses a kind of multi-layer nonlinear optical neural network computing systems based on linear signal re-encoding, belong to optical neural network computing technical field, including: control circuit and optical processing chip system;The control circuit is used to realize the loading of input signal and the reading of output result;The optical processing chip system includes light source, integrated optical computing chip and detector, and the light carrier emitted by light source generates input optical signal after being modulated by input signal, and after being processed by multi-layer nonlinear activation in linear calculation area, linear re-encoding area and high-speed modulation area on integrated optical computing chip, output result is read by detector and returned to control circuit.The application utilizes pure linear device to realize all-optical nonlinear network, cooperates analog activation function by re-encoding and modulation, needs only single physical layer to construct depth architecture without photoelectric conversion, with the advantages of all-optical processing, CMOS compatible, high speed and low power consumption.
Owner:ZJU HANGZHOU GLOBAL SCI & TECH INNOVATION CENT