8 results about "Cmos compatible" patented technology

A porous tool for porosifying a wafer includes an electrolytic cell a housing, a voltage source, and a controller The electrolytic cell includes a cathode an anode, and an electrolyte A diameter of the wafer is at least 200 mm. The housing encloses the electrolytic cell and is configured to receive the wafer for a porosification process. The housing includes a seal, an input line and an output line The controller is coupled to the housing and the voltage source. The controller is configured to control the porosification process of the wafer. Advantageously the porous tool can provide dry-in and dry-out full-scale (e.g., at least 200 mm diameter) wafer porosification, programmable wafer porosification, a closed cleanroom compatible processing environment, epitaxy and CMOS compatible processing, and automated large volume cassette-to-cassette processing.

The invention relates to CMOS compatible graphene structures, interconnects and methods of manufacture. MLG (multi-layer graphene) device layer structures are connected with vias. The structure includes an M1 MLG interconnect device layer on a dielectric layer. An interlayer dielectric separates the M1 MLG interconnect device layer. An M2 MLG interconnect device layer is on the interlayer dielectric. A metal via penetrates the M2 MLG interconnect device layer, the interlayer dielectric and the M1 MLG interconnect device layer and forms an edge contact through the thickness of the M1 MLG and M2 MLG layers. A method of forming MLG layers by diffusion of carbon from a solid phase graphene precursor through a catalyst layer to deposit MLG on a dielectric or metal layer via application of mechanical pressure at a diffusion temperature.

The invention relates to the technical field of photoelectric detectors and integrated optoelectronic chips, and discloses a high-sensitivity integrated full-Stokes polarization detector and a preparation method thereof. The high-sensitivity integrated full-Stokes polarization detector sequentially comprises a titanium oxide metasurface polarization selection layer, an ITO transparent electrode layer, an upper electrode layer, a silicon-based NPN bipolar phototransistor detection unit, a filling layer, a silicon substrate layer and a lower electrode layer from top to bottom. The titanium oxide metasurface polarization selection layer comprises a plurality of metasurface units constructed by all-dielectric high-refractive-index titanium oxide; the titanium oxide metasurface polarization selection layer and the silicon-based NPN bipolar photoelectric transistor detection unit are integrated in a monolithic mode through the CMOS compatible technology, and each metasurface pixel in the titanium oxide metasurface polarization selection layer corresponds to each detection pixel in the silicon-based NPN bipolar photoelectric transistor detection unit in a one-to-one mode on the plane. Through the titanium oxide metasurface structure, the accuracy and sensitivity of Stokes parameter detection are improved.

The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.

A complementary metal oxide semiconductor (CMOS) device embedded with microelectromechanical system (MEMS) components in a MEMS region. The MEMS components, for example, are infrared (IR) thermosensors. The device is encapsulated with a CMOS compatible IR transparent cap to hermetically seal the device using wafer-level vacuum packaging techniques.

A complementary metal oxide semiconductor (CMOS) device embedded with microelectromechanical system (MEMS) components in a MEMS region. The MEMS components, for example, are infrared (IR) thermosensors. The device is encapsulated with a CMOS compatible IR transparent cap to hermetically seal the device using wafer-level vacuum packaging techniques. The cap includes an integrated focusing system with a metalens module for focusing IR radiation onto the sensors.

The invention provides a heterojunction integrated ultra-wideband tunable semiconductor laser, which comprises an III-V / Si heterojunction gain module, a DBR-micro-ring composite tuning module, a phase control module, a bus waveguide, an adjustable coupler module and an output module which are integrated on a CMOS compatible silicon photon chip, and all the modules act synergistically, so that high-efficiency excitation of wide-spectrum gain is ensured, and high-efficiency excitation of the wide-spectrum gain is realized. And accurate wavelength tuning and stable laser output are realized, and core light source support is provided for the fields of ultra-wideband optical communication, high-precision optical sensing and the like. According to the invention, ultra-wideband wavelength tuning (covering an S band, a C band and an L band) can be realized, the integration level is high, the power consumption is low, the stability is high, and the method is suitable for the fields of ultra-wideband wavelength division multiplexing transmission, frequency modulation continuous wave laser radar, distributed optical fiber sensing, medical wearable equipment and the like.

The application discloses a kind of multi-layer nonlinear optical neural network computing systems based on linear signal re-encoding, belong to optical neural network computing technical field, including: control circuit and optical processing chip system;The control circuit is used to realize the loading of input signal and the reading of output result;The optical processing chip system includes light source, integrated optical computing chip and detector, and the light carrier emitted by light source generates input optical signal after being modulated by input signal, and after being processed by multi-layer nonlinear activation in linear calculation area, linear re-encoding area and high-speed modulation area on integrated optical computing chip, output result is read by detector and returned to control circuit.The application utilizes pure linear device to realize all-optical nonlinear network, cooperates analog activation function by re-encoding and modulation, needs only single physical layer to construct depth architecture without photoelectric conversion, with the advantages of all-optical processing, CMOS compatible, high speed and low power consumption.