2results about How to "Realize online test" patented technology

The invention discloses a circuit breaker stroke curve test system and method, the test system comprises a stable light source, an emission collimator, a circuit breaker moving part, a receiving collimator, an optical power acquisition loop and a processing unit, the output of the stable light source is connected to the tail part of the emission collimator through an optical fiber, the emission collimator and the receiving collimator are oppositely arranged, and the optical power acquisition loop is connected with the processing unit. A gap for movement of a moving part of the circuit breaker is reserved between the transmitting collimator and the receiving collimator; the tail part of the receiving collimator is connected to an optical power acquisition loop through an optical fiber; and the optical power acquisition loop transmits data to a processing unit. According to the test system and method, the online test of the state of the circuit breaker can be realized. The sensor is not mechanically or electrically connected with a circuit breaker operating mechanism, and has the advantages of high sampling rate, strong anti-interference capability, small installation size and the like.

The application relates to an error injection method and device, computer equipment and a readable storage medium. The method comprises the following steps: determining an error injection requirement based on a configuration operation, the configuration operation being used for configuring at least one or a combination of a target logical address, an error type and a trigger condition; converting the error injection requirement into an error injection command, storing the error injection command into a content addressable memory (CAM) for scheduling, and obtaining a scheduling result; and according to the scheduling result, issuing the error injection command and a dynamic random access memory (DRAM) physical address to a corresponding DRAM control unit to execute the error injection through the DRAM control unit. Thus, the system can remain in a normal operation state during the entire error injection process, without entering a special test mode, ensuring the normal execution of a refresh operation, and the interaction between AXI internal and address mapping modules is reused, without affecting business continuity, so that the universality is enhanced.