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115results about How to "Reduce lattice mismatch" patented technology

Novel SINP silicone blue-violet battery and preparation method thereof

he invention relates to a novel SINP silicone blue-violet battery and a preparation method thereof. The invention uses shallow junctions formed from thermally diffused phosphorus, an ultra-thin SiO2 layer formed by low-temperature thermal oxidization and an ITO dereflection/collection electrode film formed by RF magnetron sputtering to prepares a novel ITO/SiO2/np blue-violet reinforced SINP silicone photo-battery. Preparation method of the invention is to take a silicon single crystal flake which is P type, and has crystallographic orientation of 100, electric resistivity of 2 2omega.cm and thickness of 220mu m, as a substrate. The substrate is cleaned and is etched by routine chemistry, and then is thermally diffused by POC3 liquid source to form n regions (the invention prepares two pieces of novel SINP photo-batteries, one being routine SINP photo-battery having emitting region square resistance of 10 Omega/square and junction depth of 1 Mu m, and the other one being SINP silicone blue-violet battery having emitting region square resistance of 37 Omega/square and junction depth of 0.4 Mu m). Removing the phosphorosilicate glass (HF:H2O=1:10) at front face; steaming Al at back of the silicon chip; thermally oxidizing the silicon chip at 400 to 500 DEG C and condition of V2:O2=4:1 for 15 to 30min to generate a layer of 15 to 20 ultra-thin SiO2 layer, and at the same time alloying the Al at the back. Then RF magnetron sputtering the ITO dereflection/collection electrode film (ITO film is also deposited on the glass to study electrooptical characteristic thereof) having high transmittance and high conductivity, and sputtering a Cu gate electrode by metal mask direct-current magnetron. Finally, cutting the outer edge part of the battery by a diamond excircle downward cutting/a dicing saw so as to prevent short circuit of the edge of the photo-battery.
Owner:SHANGHAI UNIV

Gallium nitride light emitting diode and preparation method thereof

The invention discloses a gallium nitride light emitting diode and a preparation method thereof and belongs to the field of light emitting diodes. The method comprises the following steps: providing a foreign substrate, and depositing a first buffering layer on the foreign substrate by taking a first temperature as a growing temperature; depositing a second buffering layer on the first buffering layer and enabling the second buffering layer to grow at a second temperature from the time of beginning to grow to a first pre-set time, wherein the first temperature is lower than the second temperature and the differential value range of the first temperature and the second temperature is 410-460 DEG C; depositing a third buffering layer on the second buffering layer by taking a third temperature as the growing temperature, wherein the second temperature is lower than the third temperature; and sequentially depositing an N type contact layer, a light-emitting layer, an electronic barrier layer and a P type contact layer on the third buffering layer to finish the preparation of the gallium nitride light emitting diode. The light emitting diode is prepared by adopting the method. The growing starting temperature of the second buffering layer is between the growing temperature of the first buffering layer and the growing temperature of the third buffering layer and the second buffering layer has the buffering and protection effects on the third buffering layer.
Owner:HC SEMITEK CORP

LED epitaxial structure based on graphene substrate, growing method and LED

The invention discloses an LED epitaxial structure based on a graphene substrate, a growing method and an LED. The graphene substrate comprises a substrate and a graphene layer positioned on the surface of one side of the substrate. The LED epitaxial structure comprises a buffer layer grown on the graphene substrate and an N-type GaN layer, an active layer and a P-type GaN layer which are grown onthe buffer layer in an overlapped manner in sequence, wherein the buffer layer comprises buffer sub-layers grown on the surface of the side, away from the substrate, of the graphene layer; the buffersub-layers are AlN buffer sub-layers, GaN buffer sub-layers, InGaN buffer sub-layers or AlGaInN buffer sub-layers. Through the technical scheme provided by the invention, the buffer layer of the LEDepitaxial structure is grown on the graphene substrate, the lattice mismatch between the LED epitaxial structure and the graphene substrate is reduced, the stress between the graphene substrate and the LED epitaxial structure is reduced, and then the LED epitaxial structure with high crystalline quality can be prepared, so that a polarization electric field is reduced effectively, the bending of an energy band is reduced, and the composite efficiency of electrons and holes is improved.
Owner:YANGZHOU CHANGELIGHT

Preparation method of silicon substrate GaN-based epitaxial structure and epitaxial structure

InactiveCN110635001AReduced barrier spikesReduced valence barrier differenceSemiconductor devicesValence bandLattice mismatch
The invention discloses a preparation method of a silicon substrate GaN-based epitaxial structure. The preparation method comprises the following steps: forming Al atoms, a AlN layer, a Aly1Ga1-y1N buffer layer, an intrinsic GaN layer, a N-GaN layer, an Inx1Ga1-x1N-GaN superlattice layer, a MQW Layer, a P-type Aly2Ga1-y2N layer and a P-GaN layer on the surface of a silicon substrate so as to obtain a finished product of the silicon substrate GaN-based epitaxial structure, wherein the value range of y2 is 0-0.3 and y2 increases with the increase of the thickness of the P-type Aly2Ga1-y2N layerin the P-type Aly2Ga1-y2N layer. The P-type Aly2Ga1-y2N layer can reduce the barrier difference between the last barrier layer and the P-type Aly2Ga1-y2N layer, i.e. the lattice mismatch between the last barrier layer and the P-type Aly2Ga1-y2N layer so as to avoid the introduction of large strain and polarization field, reduce the barrier spike formed by the valence band of the electron barrier layer and reduce the obstacle of hole injection. Meanwhile, the barrier of the conduction band of electron barrier layer increases with the increase of Al composition and the blocking effect on electron overflow quantum well is enhanced, and thus the radiation recombination efficiency of the quantum well region can be increased and the brightness of LED can be improved.
Owner:FOSHAN NATIONSTAR SEMICON

Ultraviolet light-emitting diode (LED) epitaxial structure and growth method thereof

The invention provides an ultraviolet light-emitting diode (LED) epitaxial structure. The epitaxial structure sequentially comprises an AlN Buffer layer, a high-temperature UGaN layer, a composite N-type GaN layer, a multi-quantum well (MQW) structure, an active region light-emitting quantum-well layer, an electron blocking layer (EBL) and a P-type GaN layer from bottom to top, wherein the active region light-emitting quantum-well layer comprises n layers of In<x>Ga<1-x>N/Al<y>Ga<1-y>N multi-quantum wells, each layer of In<x>Ga<1-x>N/Al<y>Ga<1-y>N multi-quantum well comprises a main barrier and a movable barrier, the movable barrier is embedded into the main barrier, the main barrier comprises Al<y>Ga<1-y>N, the height of the main barrier is gradiently increased with the increase of Al constituent, the movable barrier comprises GaN, and the thickness of each layer of movable barrier is 1-20 nanometers. By the ultraviolet LED epitaxial structure and a growth method thereof, the stress in the quantum wells is reduced, the hole injection efficiency is improved, electrons of an active layer is prevented from overflowing, and the carrier recombination probability and the internal quantum efficiency of an ultraviolet LED are improved.
Owner:宁波安芯美半导体有限公司
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