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A high-voltage-resistant silicon carbide jfet chip and a preparation method thereof
Pending
CN122421413A
reduce loss
Good high pressure
Carbide silicon
Metallurgy
本发明涉及JFET芯片技术领域,公开一种耐高压的碳化硅JFET芯片及其制备方法,包括:基底底层有N型重掺杂区,N型重掺杂区下表面有漏极电极,N型重掺杂区上表面有N型缓冲区,N型缓冲区上表面有N型阱区,N型阱区上有第一P型浅掺杂区、栅极P型浅掺杂区和第二P型浅掺杂区,这三者之间均存在间隙,栅极P型浅掺杂区上表面有P型重掺杂区,在第一P型浅掺杂区和第二P型浅掺杂区的上表面均有绝缘层,N型阱区上表面有N型源极区,N型源极区上表面有源极缓冲区,源极缓冲区上表面有源极电极,P型重掺杂区上表面有栅极缓冲区,栅极缓冲区上表面有栅极电极,源极缓冲区和栅极缓冲区之间有绝缘层。该JFET芯片实现耐高压等效果。
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