36results about How to "Improve charge distribution" patented technology

The invention discloses a mineral leaching process of bastnaesite. The mineral leaching process comprises the following steps of: (1) leaching bastnaesite with hydrochloric acid for the first time, and adding a flocculating agent to obtain first leaching residue and first leaching liquid; (2) performing alkaline transfer on the first leaching residue obtained in step (1) by using sodium hydroxide to obtain alkaline transfer residue; (3) leaching the alkaline transfer residue obtained in step (2) by hydrochloric acid for the second time, and adding the flocculating agent to obtain second leaching liquid and second leaching residue; (4) washing the secondary leaching residue obtained in step (3) by using clean water to obtain secondary leaching residue washing water; (5) preparing the flocculating agents used in step (1) and (3) through the secondary leaching residue washing water obtained in step (4); (6) mixing the first leaching liquid obtained in step (1) and the second leaching liquid obtained in step (3); and extracting and separating rare earth. The mineral leaching process is mainly applied to bastnaesite.

The invention discloses a novel low-voltage high-performance nonvolatile memory based on a separate nano graphene floating gate. The novel low-voltage high-performance nonvolatile memory comprises a substrate, a tunneling layer, a storage layer, a barrier layer and a gate electrode, wherein the storage layer is of separate nano graphene, and by utilizing the density and size modulating action of the nano graphene and the energy band modulating action of the tunneling layer, the charge distribution and holding characteristic of the storage layer can be optimized. By introducing the separate nano graphene floating gate, a nonvolatile flash memory with low energy consumption under low-voltage operation can be realized; and by effectively controlling the density and size of the nano graphene and modulating the energy band structure of the tunneling oxidizing layer, the charge distribution and holding characteristic of the storage layer can be optimized, and the high-performance operation of devices can be realized.

The invention discloses an organic solar cell with a metal mesh nested heterojunction and a preparation method thereof, which relates to the field of organic solar cells, including a transparent substrate, a transparent anode electrode, a hole transport layer, a donor material layer, an ultra-thin The mesh metal layer, the acceptor material layer, the electron buffer layer and the cathode electrode are located between the donor material layer and the acceptor material layer with a mesh-shaped continuous metal mesh nesting layer. The metal mesh layer can form a local Schottky junction with the N-type acceptor material layer. On the basis of the original heterojunction, a double built-in electric field is formed, which is conducive to the stepwise diffusion of electrons from the n-type material to the p-type material. Holes diffuse from p-type materials to n-type materials, increasing the thickness of the heterojunction structure, improving the separation efficiency of photogenerated excitons, and ultimately improving the conversion efficiency of organic solar cells.

The invention discloses a 150V-BCD (Binary-Coded Decimal) bulk silicon manufacturing technology and an LCD (Liquid Crystal Display) backlight drive chip. The 150V-BCD bulk silicon manufacturing technology comprises the following steps of: preparing a high-resistance substrate silicon sheet; adding an N-shaped buried layer on a substrate; connecting the N-shaped buried layer by using an NSINKER1 drain structure; extending an N-shaped extension layer; forming an opposite-pass structure with NSINKER2; forming an LDPMOS device region, a Resurf voltage resisting region and a channel connecting region to form a horizontal structure LPMOS high- voltage device; forming a Resurf voltage resisting region, a compensation injection JFET region, a VDNMOS device region and a composite MOS (Metal-Oxide Semiconductor) gate channel; replacing the traditional PISO isolation structure by using a deep-groove isolation structure; using double thin gate oxide (DGO) as gate oxide of a low voltage device; using N+ / P+ as drain injection of all devices; reducing interconnection resistance by using a self-alignment silicide technology (Salicide); forming contact holes; forming device connection by using MET; and using press welding points by using PAD. The LCD backlight drive chip comprises a multilevel charge-pump voltage booster circuit, an EL oscillating circuit, a VSENSE module, a high-voltage conversion module and a full-bridge type drive structure.

The invention relates to a purifying agent for sulfur, arsenic and phosphorus and a preparation method for the purifying agent. The invention is mainly to solve the problems of high bulk density and low adsorption capacity of a purifying agent in the prior art. The purifying agent for sulfur, arsenic and phosphorus provided by the invention comprises the following components in parts by weight: a)1 to 10 parts of aurichalcite; b) 10 to 50 parts of copper oxide; c) 10 to 60 parts of zinc oxide; d) 0.1 to 10 parts of nickel oxide; and e) 0.1 to 5 parts of ferric oxide. With a technical scheme of the invention, the purifying agent for sulfur, arsenic and phosphorus provided by the invention well solves the above-mentioned problems, and can be used for purification of natural gas, synthesis gas, light gaseous and liquid hydrocarbons, etc.

The invention relates to a method for preparing composite modified montmorillonite sorbent. The method comprises the following steps: adding montmorillonite suspension into hydroxy aluminum pillared solution; then, adding polyvinyl alcohol into the mixed solution; heating and stirring the mixed solution under rising temperature; washing the mixed solution until Cl<-> free after the mixed solutionis cooled; centrifuging, drying and grinding the mixed solution to obtain a powdered product; and calcining the powdered product under nitrogen atmosphere, refluxing the powdered product by sulphuricacid, washing filtered solid to obtain the composite modified montmorillonite sorbent. The invention can acquire the composite modified montmorillonite sorbent with specific surface area up to 192m<2> / g and evenly distributed bore diameter through low-price and available raw materials and simple method, and ensures that the maximum adsorption amount of the sorbent when adsorbing Cd<2+> containingsolution reaches 27.92mg / g.

The invention discloses a high-voltage-resistance junction field effect transistor. The high-voltage-resistance junction field effect transistor is improved on the basis of the existing junction field effect transistor, and particularly, polycrystalline silicon field pole plate structures are additionally arranged at one end of a gate electrode close to a drain electrode and at the drain electrode, so that the charge distribution and vector electric field distribution in a well II and a well III can be improved, further, the off-state breakdown voltage of the junction field transistor is increased, and the high-voltage-resistance junction field transistor can be manufactured.