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Recipe and preparation method of high-voltage gradient zinc oxide resistance card

ActiveCN101880157AGranular matchingWell mixedImpurityElectron
The invention discloses a recipe and a preparation method of a high-voltage gradient zinc oxide resistance card. The recipe of the zinc oxide resistance card of the invention reasonably and preferably adopts the ingredients and the contents of the zinc oxide resistance card, the zinc oxide resistance card prepared by the recipe has the high-voltage gradient as high as 350 to 600v/mm, and at the same time, under the high-voltage gradient, the zinc oxide resistance card can maintain good nonlinear characteristic, electrical property and ageing-resistant characteristic to meet the miniaturization requirement of electronic components such as lightning protectors in practical application. In the preparation method of the zinc oxide resistance card of the invention, the accessory ingredients and trace ingredients in the zinc oxide resistance card have fine granularity, are matched, and are uniformly mixed, the impurity mixing quantity is reduced, at the same time, because the low-temperature heat-insulation process is added in the sintering process, the zinc oxide resistance card forms a stable crystal boundary structure which is favorable for improving the stability of the zinc oxide resistance card and the phase change of the bismuth oxide in the secondary heat treatment process, so the electrical property of the zinc oxide bismuth oxide can be improved.
Owner:NINGBO ZHENHAI GUOCHUANG HIGH VOLTAGE ELECTRIC APP

Bend-insensitive multimode fiber

The invention relates to a bend-insensitive multimode fiber comprising a core layer, inner sheath layers and an outer sheath layer. The bend-insensitive multimode fiber is characterized in that the radius R1 of the core layer is 23-26 micrometers, the refractivity section of the core layer is parabolic, the distribution index Alpha thereof is 1.9-2.2, a maximum relative refractive index difference Delta1 thereof is 0.9-1.2%, the first inner sheath layer, the second inner sheath layer and a recessed sheath layer are provided in order from inside to outside, the unilateral width of the first inner sheath layer is 1-3 micrometers, a relative refractive index difference Delta2 of the first inner sheath layer is -0.02-0.02%, the second inner sheath layer is an all-carbon dioxide layer 2-6 micrometers in unilateral width, the recessed sheath layer is an F-doped silica glass layer, and the recessed sheath layer is an all-silica glass layer. The double-inner-sheath structure of matching viscosity is used, the influence of drawing tension upon the core layer is reduced in terms of viscosity, and bend sensitiveness of the fiber is reduced; the width of the inner sheath layers and the size of the recessed sheath layer are reasonably optimized and designed, matching of the width and the size is achieved, and optimal width and size are acquired; meanwhile, excellent bend resistance and DMD (differential mode delay) performance are achieved.
Owner:YANGTZE OPTICAL FIBRE & CABLE CO LTD

Growth method for light-emitting diode epitaxial wafer

The invention discloses a growth method for a light-emitting diode epitaxial wafer, and belongs to the technical field of a semiconductor. The growth method comprises the steps of enabling a low-temperature buffer layer, a high-temperature buffer layer, an N type layer, an MQW layer and a P type layer to be grown on a substrate in sequence, wherein the MQW layer comprises an InGaN quantum well layer and a GaN quantum barrier layer which are laminated alternately; the quantum well layer comprises a first type quantum well, a second type quantum well, and a third type quantum well; the growth temperature of the quantum well layers in the first type quantum well is lowered layer by layer; the In content of the quantum well layers in the second type quantum well is changed layer by layer; the ratio of the In content to Ga content in the quantum well layers in the third type quantum well is decreased layer by layer; and the quantum well layers belong to the first type quantum well, the second type quantum well layer and the third type quantum well in the growth direction of the light-emitting diode epitaxial wafer in sequence. By adoption of the growth method, the overlapping degree of an electron wave function and a hole wave function can be effectively improved, and the light emitting efficiency of the LED is finally improved.
Owner:HC SEMITEK ZHEJIANG CO LTD

Hidden frame glass curtain wall with steel joist frame

The invention relates to a hidden frame glass curtain wall with a steel joist frame, which overcomes the defects such as poorer surface spraying effect of common steel profile, difficulty in installing inserting cores of a horizontal steel frame and a vertical steel frame of the frame, material waste and the like in the prior art. The hidden frame glass curtain wall with the steel joist frame comprises the steel joist frame, a glass plane material and a connecting assembly for fixing the glass plane material on the steel joist frame through a glass attached frame, wherein the horizontal steel frame and the vertical steel frame of the steel joist frame are made of rectangular steel profile rolled by steel plates and are spliced through an inserting core of the horizontal steel frame, the inserting core of the horizontal steel frame is made of U-shaped steel profile with two vertical surfaces and a bottom surface, which is rolled by the steel plates, an upper vertical steel frame and a lower vertical steel frame which are adjacent vertically are spliced by using the inserting core of the vertical steel frame, and the inserting core of the vertical steel frame is made of rectangular steel profile rolled by using the steel plates. The hidden frame glass curtain wall with the steel joist frame is reasonable in structural design and convenient and rapid to install, ensures the installing precision of the horizontal steel frame and the vertical steel frame of the curtain wall, is beneficial to the release of stress generated by expansion caused by heat and contraction caused by cold, is safe and reliable in use, reduces material and installing costs, and further improves the sealing property and the decoration effect of the curtain wall.
Owner:SHENYANG YUANDA ALUMINUM IND GROUP

Thermoelectric composite treatment method suitable for reducing residual stress of metal materials

The invention relates to a thermoelectric composite treatment method suitable for reducing residual stress of metal materials. The method comprises the following steps: 1, preparing a test sample; 2, placing a to-be-treated metal workpiece (4) at two ends of electrodes of a pulsed power supply; 3, placing an infrared heating pipe (2) near the surface of the to-be-treated metal workpiece (4); 4, starting an infrared heating controller (1) and setting the infrared heating temperature at 180-190 DEG C; 5, when the infrared heating temperature reaches 180 DEG C, starting the pulsed power supply (5) at the same time; and 6, simultaneously operating the infrared heating pipe (2) and the pulsed power supply (5) for 10 minutes till the whole treatment process is completed, thereby completing the treatment of the to-be-treated metal workpiece (4). The method disclosed by the invention has the advantages that temperature-controllable low temperature thermal field treatment is carried out on metal materials by using a portable movable infrared heating device, so that the problems that in the traditional heat treatment, the heating time is long, the whole workpiece needs to be put in and other operations are inconvenient to carry out are solved.
Owner:湖南高创海捷工程技术有限公司 +1

Forming method of silicon through hole

The invention relates to a forming method of a silicon through hole. The forming method comprises the following steps: providing a semiconductor substrate; forming a ring-shaped through hole in the semiconductor substrate, wherein the semiconductor substrate inside the ring-shaped through hole is an isolated semiconductor pillar; forming diffusion barrier layers on the side wall and at the bottom of the ring-shaped through hole; full filling the ring-shaped through hole with a conductive layer; removing all the semiconductor pillar or removing part of the semiconductor pillar to reserve part of a thickness until an opening with a depth-to-width ratio of greater than or equal to 20 is formed; and sealing the opening to form an air gap. According to the method, firstly the ring-shaped through hole is formed, the ring-shaped through hole is full filled with the conductive layer, then the semiconductor pillar formed inside the ring-shaped through hole in a surrounding manner is removed to form the opening and the opening is sealed to form the air gap; the air gap provides a large deformation space for plastic deformation of the conductive layer and is beneficial for releasing stresses in the conductive layer and an insulating layer; the possibility that a silicon through hole generates the layering and cracking phenomena is reduced; and reliability of the silicon through hole is improved.
Owner:SEMICON MFG INT (SHANGHAI) CORP
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