The invention provides a semiconductor epitaxial structure and a preparation method and application thereof. A p-type semiconductor layer in the semiconductor epitaxial structure comprises a p-type barrier layer, the p-type barrier layer comprises at least one p-type structure, the p-type structure comprises a barrier front sub-layer, a p-type nitridemicrostructure and a barrier rear sub-layer which are arranged in sequence, and the p-type nitridemicrostructure comprises a plurality of nanometer protruding parts which are distributed on the surface, away from an active layer, of the barrier front sub-layer. The rear barrier sub-layer covers the plurality of nano convex parts and the surface, which is not covered by the nano convex parts, of the front barrier sub-layer; the material of the barrier front sub-layer is a first nitride doped with acceptor impurities, the material of the nanometer protruding part is a second nitride, and the valence band of the second nitride is higher than that of the first nitride. According to the invention, the p-type nitride microstructure is arranged in the p-type barrier layer so as to reduce the activation energy of acceptordoping, and a relatively strong polarization effect is formed at an interface, thereby cooperatively improving the hole concentration.
The application discloses an epitaxial structure of a semiconductor device, a preparation method of the epitaxial structure and the semiconductor device. The epitaxial structure of the semiconductor device comprises a substrate and an epitaxial layer located on one side of the substrate. The epitaxial layer comprises at least one back barrier layer. The back barrier layer comprises AlGaN and acceptordoping ions. The acceptordoping ions are used to form acceptor energy levels in the back barrier layer. According to the application, the acceptor energy levels are formed by introducing the acceptor doping ions into the AlGaN back barrier layer, the electrons in the back barrier layer are captured, the current collapse phenomenon is effectively relieved, the leakage current is reduced, and therefore the crystal quality and the device reliability are improved.
The invention relates to a low-impact-flow ceramic PTC (Positive Temperature Coefficient) material and a preparation process thereof, and belongs to the technical field of ceramic PTC materials. On one hand, the pinning effect is formed and the NTC effect is reduced through heavy donor and heavy acceptordoping, so that the impulse flow is reduced, and on the other hand, excessive siliconoxide is introduced to adsorb impurities and reduce the NTC effect, so that the impulse flow is reduced. According to the invention, the impulse current can be reduced on the premise of not changing the starting current, and the application prospect is excellent.
The application relates to a low-impactceramic PTC material and a preparation process thereof, and belongs to the technical field of ceramic PTC materials. In the application, heavy donor heavy acceptordoping is adopted to form pinning effect, reduce NTC effect, and thus reduce impact flow; on the other hand, excess siliconoxide is introduced to absorb impurities, reduce NTC effect, and thus reduce impact flow. The application can reduce impact flow without changing starting current, and has excellent application prospect.
This invention belongs to the field of semiconductors and relates to a method for fabricating enhancement-mode galliumoxide transistors based on nitrogenion channel implantation doping. An n-type β-Ga₂O₃ epitaxial layer is fabricated on the galliumoxidetransistor substrate. High-concentration n-type implantation is then performed on the source and drain electrode sites on the epitaxial layer, followed by annealing activation. Subsequently, source and drain electrodes are fabricated to form ohmic contacts. Next, the gate termination positions of the channel region are defined by photolithography, and nitrogen ions are implanted into the gate termination positions to form nitrogenacceptor doped regions. After implantation, rapid annealing activates the nitrogen acceptor doped regions and repairs lattice damage. An insulating layer is then deposited in a portion of the epitaxial layer, and the gate electrode is fabricated, ultimately obtaining the desired galliumoxidetransistor. This invention utilizes nitrogen ions to form acceptordoping in the channel region, achieving enhancement-mode operation by compensating for n-type charge carriers, effectively eliminating defects such as sidewall lattice damage, increased interface state density, and electric field concentration at channel corners caused by etching processes.
The application discloses an electromagnetic voltagetransformer current-limiting and resonance-eliminating device based on PTC characteristics and an optimization method thereof, and relates to the technical field of power protection. The device comprises the following steps: adopting donor doping, acceptordoping and glass phase modification to regulate and control bariumtitanate-based positive temperature coefficient ceramics to form a positive temperature coefficient core; forming a conductive electrode layer on the positive temperature coefficient core; connecting the positive temperature coefficient core in series according to the number of multiple pieces and in series according to the insulation packaging parameters, and then connecting the positive temperature coefficient core in series between a primary neutral point of a voltagetransformer and the ground to form a current-limiting and resonance-eliminating device; and arranging the collected zero sequence voltage and neutral point current according to a unified sampling time mark to form a joint discrimination signal. The application can improve the identification accuracy among frequency resonance, fundamental frequencyferromagnetic resonance, arc grounding and single-phase grounding by first screening abnormal states in layers and then further distinguishing power frequency dominant abnormalities, so that the misjudgment and misoperation are reduced.
The application provides a semiconductor epitaxial structure, a preparation method and application thereof. The p-type semiconductor layer of the semiconductor epitaxial structure comprises a p-type barrier layer, the p-type barrier layer comprises at least one p-type structure, the p-type structure comprises a barrier front sublayer, a p-type nitridemicrostructure and a barrier rear sublayer arranged in sequence, the p-type nitridemicrostructure comprises a plurality of nano protrusions distributed on the surface of the barrier front sublayer away from the active layer, the barrier rear sublayer covers the plurality of nano protrusions and the surface of the barrier front sublayer not covered by the nano protrusions; the material of the barrier front sublayer is a first nitride doped with an acceptorimpurity, the material of the nano protrusions is a second nitride, and the valence band of the second nitride is higher than that of the first nitride. The p-type nitride microstructure is arranged in the p-type barrier layer to reduce the activation energy of the acceptordoping, and a stronger polarization effect is formed at the interface, so that the hole concentration is improved.