42results about How to "Lower Schottky barrier" patented technology

The invention discloses a microbubble generator and a preparation method thereof. The microbubble generator comprises a substrate, two electrodes and a carbon nano tube, wherein each of the two electrodes comprises graphene; the carbon nano tube is connected with the two electrodes through the graphene and is used as a heating component. The preparation method comprises the following steps of performing spin-coating on the surface of a metal foil, on which the graphene grows, with PMMA (polymethyl methacrylate); removing the metal foil, transferring the graphene protected by the PMMA to the substrate, and performing thermal treatment to enable the graphene to be tightly combined with the substrate; removing the PMMA; performing photoetching and reaction ion etching to obtain the two graphene electrodes; and covering the substrate with Cu2O nano particles serving as a catalyst, and with a hydrocarbon as a carbon source, growing a horizontal orientated carbon nano tube perpendicular to the graphene electrodes under the temperature of 800-950 DEG C through a low-pressure CVD (chemical vapor deposition) technology. The power consumption of the microbubble generator is reduced, and the service life of the microbubble generator is effectively prolonged; furthermore, the microbubble generator is simple in structure and flexible in design and has good high-frequency response and intensive integration potential.

The invention provides a transistor formation method, which comprises the following steps: providing a substrate; forming a gate structure on the surface of the substrate; forming an opening in the substrate at the two sides of the gate structure; forming a stress layer in the opening; forming a cover layer on the surface of the stress layer, wherein the cover layer is doped by oxygen family element ions; and through metal silicification process, converting the cover layer into an electric contact layer, wherein the electric contact layer is made of metal silicide doped by oxygen family element ions. According to the formed transistor, resistance of the surface of the stress layer is reduced, and working current of the transistor is improved, and performance thereof is stable.

The invention belongs to the field of two-dimensional materials, and specifically discloses a two-dimensional molybdenum ditelluride vertical heterojunction and its preparation method and application, which include 1T'‑MoTe 2 and 2H‑MoTe 2 Two parts, and the two parts are connected by interlayer van der Waals force; preparation steps: S1, after drying the mixed solution of ammonium tetramolybdate and sodium chloride, put it into the reactor as a molybdenum source, and place a growth substrate on the molybdenum source, Tellurium powder is put into the reactor as a tellurium source and placed upstream of the molybdenum source; S2 raises the temperature of the molybdenum source and the tellurium source to the reaction temperature and then cools down to room temperature naturally, and at the same time, feeds carrier gas into the reactor to release the tellurium The source is brought to the molybdenum source, and a reducing agent is passed through to form a two-dimensional molybdenum ditelluride vertical heterojunction on the growth substrate. Metal phase and semiconductor phase vertically stacked MoTe prepared by the present invention 2 The heterostructure can effectively reduce the Schottky barrier between metal electrodes and material contacts, and provides an important idea for improving metal-semiconductor contacts.

The invention belongs to the field of photoelectric devices and discloses a microetching method of a cadmium telluride nanocrystalline thin film. A mask plate is cover on that cadmium telluride nanocrystalline thin film, and the surface of the cadmium telluride nanocrystalline thin film is micro-etched by the steam of the etching solution to obtain the etch cadmium telluride nanocrystalline thin film. The method of the invention can avoid the problem of device leakage caused by damaging the PN junction of the thin film, and simultaneously reduce the Schottky barrier between the high work function cadmium telluride and the electrode.

The invention discloses a vertical structure LED chip with a double-insertion-layer reflector structure, which comprises an Si substrate, an LED epitaxial wafer, a reflector first insertion metal layer, a nano Ag reflector and a reflector second insertion metal layer, wherein the LED epitaxial wafer grows on the Si substrate, the reflector first insertion metal layer grows on the surface of the LED epitaxial wafer, the nano Ag reflector grows on the surface of the reflector first insertion metal layer, and the reflector second insertion metal layer grows on the surface of the nano Ag reflector. The invention further provides a preparation method of the vertical structure LED chip with the double-insertion-layer reflector structure. The vertical structure LED chip improves the problems of poor adhesion and poor thermal stability of an Ag-based reflector, greatly improves the process stability of the Ag-based reflector and the reflectivity of the reflector, and thus improves the yield and light output efficiency of the vertical structure LED chip.

The invention discloses a method for carrying out Fermi energy level modification on a top electrode, which comprises the following steps: step 1) carrying out thermal oxidation growth of an insulation dielectric thin film on a conductive silicon substrate; step 2) carrying out vacuum evaporation of a layer of organic semiconductor material on the surface of the insulation dielectric thin film; step 3) using electron beam evaporation for evaporating a layer of metal nickel on the organic semiconductor material through a stencil, and naturally oxidizing the metal nickel to nickel oxide in the air; and step 4) continuously using the electron beam evaporation for evaporating a metal electrode through the stencil and completing the production of a device. The utilization of the method can effectively reduce the infiltration and the reaction of a gold electrode to the organic semiconductor layer; simultaneously, the naturally oxidized nickel oxide layer can be taken as a high-work-functiontransition layer, thereby reducing the Schottky barrier between the gold electrode and the organic semiconductor layer and further improving the contact between the electrode and an active layer.

The invention relates to the technical field of semiconductor materials, and specifically provides a NiGe single crystal thin film and a preparation method and application thereof. The preparation method comprises the following steps: providing a clean Ge(001) substrate; heating the Ge(001) substrate in a vacuum to obtain a pre-used substrate; performing Ni reactive evaporation treatment on the pre-used substrate under vacuum, Form a layer of NiGe single crystal film on the surface of Ge(001); evaporate a layer of Ni film on the surface of NiGe single crystal film at room temperature; anneal the Ge(001) substrate in an inert atmosphere to make the Ni film diffuse A NiGe single crystal film is passed through, and the NiGe single crystal film is used as a single crystal seed layer, and a solid phase reaction occurs with a Ge(001) substrate to obtain a NiGe single crystal film with an unlimited thickness. The method can obtain NiGe single crystal film with low Schottky potential barrier, small contact resistance and good thermal stability, and is suitable for MOSFET field.

The invention discloses a thermal jet-printing head based on a graphene-carbon nanotube composite structure, and a preparation method thereof. An ICP process and a surface smoothing process of filling deep grooves with PDMS are adopted, and a main channel, an ink jet chamber, an ink inlet channel, a nozzle and an ink jet channel are prepared in a silicon underlayer; and an anodic bonding process is adopted, graphene pieces are taken as a middle layer, and a glass substrate is bonded with the silicon underlayer. The main channel communicates with the ink jet chamber through the ink inlet channel, the depth of the ink inlet channel is less than the depth of the ink jet chamber; the nozzle is formed in the bottom of the ink jet chamber; and a microbubble generator array with a carbon nanotube-graphene composite structure and a carbon nanotube temperature sensor array are prepared in an area corresponding to the ink jet chamber, of the glass substrate, and arranged in a manner of facing the ink jet chamber. The jet head is reliable in liquid inlet closure, high in bonding strength, not liable to pollute a jet-printing chamber, and capable of easily controlling accuracy during preparation.