7results about How to "Good rectification characteristics" patented technology

The invention discloses a silicide connection layer forming method and a semiconductor device, and the method comprises the steps: providing a semiconductor structure which is made of silicon; forming a protective layer on the semiconductor structure and forming a metal layer on the protective layer; performing an annealing process so that metal particles in the metal layer pass through the protective layer and react with silicon in the semiconductor structure to form an intermediate layer; removing the remaining part of the metal layer under the condition that the protective layer protects the intermediate layer; the annealing process is performed again so that the intermediate layer continues to react with the silicon in the semiconductor structure to form a silicide connection layer, and the protection layer is removed. In the process of removing the residual part of the metal layer, the middle layer is not damaged due to the protection of the protection layer, and the performance of the semiconductor device is improved.

The invention discloses a power device and a preparation method thereof, a power module, a power conversion circuit and a vehicle. The power device comprises the following steps: providing a silicon carbide substrate; forming a silicon carbide epitaxial layer on one side of the silicon carbide substrate; growing at least one silicon film layer on one side, far away from the silicon carbide substrate, of the silicon carbide epitaxial layer; forming a planar tubular gate structure on one side, far away from the silicon carbide epitaxial layer, of the at least one silicon film layer; forming a planar source electrode structure on one side, far away from the silicon carbide epitaxial layer, of the at least one silicon film layer; and forming a drain on one side of the silicon carbide substrate away from the silicon carbide epitaxial layer. According to the technical scheme provided by the embodiment of the invention, the electron mobility of the planar power device is improved, and the on-resistance of the planar power device is reduced.

The invention discloses a preparation method of a laminated PbS quantum dot detector, and belongs to the technical field of infrared detectors. The method comprises the following steps: preparing a ligand and a dispersing agent; providing a substrate; preparing a bottom electrode on the substrate; preparing a hole transport layer on the bottom electrode, wherein the hole transport layer comprises a NiOx thin film and a PbS-EDT thin film; preparing a long-wave light absorption layer on the hole transport layer, wherein the long-wave light absorption layer comprises 2000nm PbS CQD; preparing a short-wave light absorption layer on the long-wave light absorption layer, wherein the short-wave light absorption layer comprises 1550nm PbS CQD; preparing an electron transport layer on the short-wave light absorption layer, wherein the electron transport layer comprises a C60 thin film and a thin film; and preparing a top electrode on the electron transport layer. According to the method, the short-wave light absorption layer and the electron transmission layer are in direct contact to form a main junction, the electron tunneling potential barrier is increased by utilizing the wide-band gap characteristic of the short-wave light absorption layer, meanwhile, the defects are low, trap auxiliary tunneling current is reduced, dark current is reduced, and full coverage of 1550-2000 nm can be achieved through the design of stacking the long-wave light absorption layer and the short-wave light absorption layer.

The present invention discloses a power device and a preparation method, a power module, a power conversion circuit and a vehicle. The power device comprises: providing a silicon carbide substrate; forming a silicon carbide epitaxial layer on one side of the silicon carbide substrate; growing at least one silicon film layer on the side of the silicon carbide epitaxial layer away from the silicon carbide substrate; forming an anode on the side of the at least one silicon film layer away from the silicon carbide epitaxial layer; and forming a cathode on the side of the silicon carbide substrate away from the silicon carbide epitaxial layer. The technical solution provided in the embodiment of the present invention improves the electron mobility of the silicon carbide Schottky diode and reduces the on-resistance of the silicon carbide Schottky diode power device.

The invention discloses a preparation method of a passive device, and belongs to the technical field of integrated circuits. The method comprises the following steps: growing an isolation layer on a silicon substrate; a bottom electrode is formed through dry etching, and the work function of the bottom electrode is gt; 4.7 eV; a functional layer NbOx thin film is deposited on the bottom electrode, and the work function of the NbOx thin film ranges from 3.3 eV to 4.0 eV by regulating and controlling the oxygen content in the NbOx thin film; forming a top electrode on the functional layer, wherein the work function of the top electrode is gt; 4.7 eV; the electric potential difference between the functional layer NbOx thin film and the bottom electrode and the electric potential difference between the functional layer NbOx thin film and the top electrode are kept between 1 eV and 1.8 eV. The energy band of the NbOx thin film is matched with the energy band of the top electrode and the energy band of the bottom electrode, and forming-free operation is achieved. The reliability problem caused by initialization of the gating device is solved, and the problem that in the prior art, large operation voltage is increased, and peripheral circuit design is complex is solved.

A graphene / 4H-SiC alpha particle detector and a preparation method thereof, and relate to the technical field of semiconductor radiation detectors. The detector comprises: a 4H-SiC substrate, and an n-type epitaxial layer located on the upper surface of the 4H-SiC substrate; an ohmic contact electrode formed on the lower surface of the 4H-SiC substrate; and a Schottky incident window electrode formed on the upper surface of the n-type epitaxial layer; wherein the Schottky incident window electrode is composed of graphene with an atomic level thickness, and the graphene forms a Schottky contact with the n-type epitaxial layer. The atomic level thickness of graphene is used to suppress the "dead layer" effect of the incident window, thereby improving the energy resolution of the detector.

The invention discloses a high-performance integrated gel ion diode and a preparation method and application thereof. The integrated gel ion diode comprises P-type semiconductor hydrogel, diaphragm hydrogel and N-type semiconductor hydrogel, the P-type semiconductor hydrogel, the diaphragm hydrogel and the N-type semiconductor hydrogel are integrally formed, and a hydrogel matrix is polyacrylamide. A digital photocuring 3D printing technology is utilized, a P-type semiconductor hydrogel solution, a diaphragm hydrogel solution and an N-type semiconductor hydrogel solution are sequentially printed and cured, and the solutions are cured into gel to form P-type semiconductor hydrogel, diaphragm hydrogel and N-type semiconductor hydrogel. According to the prepared gel ion diode, integration is guaranteed, meanwhile, the high rectification ratio and the high forward current are achieved, and due to the high conductivity and the high rectification ratio, the integrated gel ion diode can be used in an actual circuit.