9results about How to "Reduce void rate" patented technology

The application provides a precision preformed soldering piece and a preparation method thereof. By arranging a graphene layer between the preformed soldering piece and a flux layer, the welding quality and efficiency can be improved, the energy consumption and environmental pollution in the welding process can be reduced, the welding strength and corrosion resistance can be improved, the oxidation and thermal stress in the welding process can be reduced, the cavity rate can be reduced, the precision can be improved, fullerene is added in the alloy raw material, the fullerene has high chemical stability and strong mechanical properties, can form strong bonding with rare earth metals, has high heat conduction performance, can effectively dissipate heat, avoids overheating of the welding part to cause failure, significantly reduces the cavity rate, improves the precision of the welding, reduces the welding temperature required by the preformed soldering piece, and has excellent oxidation resistance, which can effectively prevent the oxidation of the metal surface.

The invention discloses a black vehicle-oriented real-time point cloud fusion detection method, system and device, and a medium. The method comprises the following steps: step 1, obtaining point cloud data through a laser radar; 2, scanning the point cloud data, marking the continuous point cloud blocks with the reflection intensity of 0 as unlicensed car identifiers, and storing the unlicensed car identifiers in point cloud attribute positions; step 3, performing dual-thread compensation, performing clustering operation on the point cloud data set with the unlicensed car identifier by using DBSCAN, and performing imaging processing on a clustering operation result by using Point Pill to obtain a three-dimensional image model; forcibly outputting an unlicensed vehicle detection frame image according to an image processing result or improving the confidence coefficient as an unlicensed vehicle compensation confidence coefficient, and preferentially adopting a model result; when the two conditions do not belong to the above two conditions, performing weighted fusion on the operation result; and step 4, fusing operation results in the step 3 into a complete three-dimensional frame image. Therefore, the problem of missing detection is solved, and the detection rate and detection efficiency are improved.

This invention relates to the field of advanced semiconductor packaging and chiplet integration technology, specifically disclosing a heterogeneous die system-on-a-chip and its fabrication method. The method includes: S1: providing an adapter board, the top surface of which is provided with a first I / O pad, and forming a first metal interconnect region above the first I / O pad, or using the first I / O pad as the first metal interconnect region; S2: providing a chiplet, the top surface of which is provided with a second I / O pad, and fabricating a second metal interconnect region on the top surface of the chiplet. This invention achieves self-aligned interconnection of the metal interconnect regions between the chiplet and the adapter board by combining an open area on the top surface of the adapter board with selective deposition, eliminating the need for high-precision photolithography alignment and significantly reducing process complexity. Simultaneously, this method supports multi-layer PAD expansion, multi-array parallel interconnection, wafer-level batch integration, and various layout methods, achieving high-density, low-latency, and high-reliability chiplet interconnection.

A method for forming a semiconductor structure, the method comprising: providing a substrate, the substrate having gate structures formed thereon, source / drain doped layers formed in the substrate on both sides of the gate structures, source / drain interconnect lines formed between adjacent gate structures, the source / drain interconnect lines covering the top of the source / drain doped layers and electrically connected to the source / drain doped layers, and an interlayer dielectric layer formed on the substrate, the interlayer dielectric layer covering the gate structures and the source / drain interconnect lines; forming a first interconnect plug through the interlayer dielectric layer, the first interconnect plug being on top of a gate structure and electrically connected to the gate structure, or the first interconnect plug being on top of a source / drain interconnect line and electrically connected to the source / drain interconnect line; forming a growth inhibition layer on top of the first interconnect plug; forming a first opening through the interlayer dielectric layer; and forming a second interconnect plug in the first opening, the second interconnect plug being electrically connected to a structure to be interconnected. The probability of the first interconnect plug contacting an adjacent second interconnect plug is reduced, thereby affecting the performance of the semiconductor structure.

The invention relates to the technical field of automatic driving, in particular to an open set 3D occupancy prediction framework suitable for an automatic driving scene, which comprises a multi-source data processing module, an occupancy prediction processing module, a model training optimization module and a post-processing and visualization module. According to the open set 3D occupancy prediction framework suitable for the automatic driving scene and the implementation method, through a dynamic-static separation fusion-Poisson reconstruction technology, high-quality dense 3D occupancy representation is generated, holes are filled, semantic differences between a dynamic target and a static scene are reserved, the void rate of a voxel grid after densification is reduced in a nuScenes data set test, and the performance of the open set 3D occupancy prediction framework suitable for the automatic driving scene is improved. The method has the advantages that the accuracy of semantic tags is improved, the problem of sparsity of 3D data is solved, 2D visual features, 3D voxel features and CLIP text features are aligned through knowledge distillation loss, and high-precision prediction of known categories and effective recognition of unknown categories are realized at the same time through double prediction heads and an unknown category decision-making mechanism.

The application relates to a formic acid tin paste with ultra-low porosity, a preparation method and application thereof, the tin paste is prepared from the following raw materials in percentage by mass: 85-90% of alloy welding powder and 10-15% of a fluxing agent; the fluxing agent comprises the following raw materials in parts by weight: 5-10 parts of an activator, 1-5 parts of a rheological agent, 30-40 parts of an organic solvent, 20-30 parts of a paste forming agent, 3-5 parts of a surfactant and 0.1-0.5 parts of a corrosion inhibitor, the surfactant is a composition of lauryl amphoteric imidazoline surfactant, isomeric tridecanol polyoxyethylene ether and N-vinyl caprolactam, and the activator is a composition of castor oil acid, ethylenediaminetetraacetic acid and succinic acid amine salt. The surfactant and the activator in the fluxing agent of the application synergistically act, ensure the welding surface and the solder cleanliness, improve the wettability and the flowability, reduce the porosity, make the solder uniformly spread and fill, form a high-quality welding spot, and significantly reduce the tin paste porosity.

This invention relates to the field of semiconductor materials and discloses a method for preparing a ceramic copper-clad substrate. First, silicon nitride ceramic and oxygen-free copper sheets are encapsulated to isolate them from oxygen. The encapsulated sample is then placed in a spark plasma sintering furnace and evacuated to a vacuum of 1.0 x 10⁻⁶. ‑3 The sample was heated to 700-750℃ to obtain a sealed enclosure with a high internal vacuum. Finally, it was placed in a hot isostatic pressing furnace under a uniform pressure of 150-200 MPa and a temperature of 700-750℃ to ensure a uniform and tightly bonded internal structure within the silicon nitride ceramic substrate. A transition layer of approximately 2 μm thick was formed between the ceramic and the copper sheet through interdiffusion, resulting in a tight bond between the silicon nitride ceramic and copper with low porosity.

The application discloses an active metal brazing ceramic copper-clad plate and a preparation method thereof. The active metal brazing ceramic copper-clad plate has a structure from top to bottom as follows: an oxygen-free copper foil (201) with a thickness of 0.2mm-2mm; an active metal brazing paste (301) with a thickness of 10um-40um; a ceramic substrate (10) with a thickness of 0.25mm-1mm; an active metal brazing paste (302) with a thickness of 10um-40um; and an oxygen-free copper foil (202) with a thickness of 0.2mm-2mm. The active metal brazing paste comprises active metal brazing filler powder and active metal brazing filler organic carrier, and the mass percentage of the active metal brazing filler organic carrier is 10wt%-20wt%. Compared with the prior art, the application has the following beneficial effects: the active metal brazing ceramic copper-clad plate realizes low-stress and high-strength brazing combination of the ceramic substrate and the oxygen-free copper foil, and has the advantages of high peeling strength, low cavity rate, low surface warping degree, high heat cycle reliability and the like.

The utility model discloses a kind of chip vacuum welding tool, including the bottom plate of interval arrangement, middle plate and top plate, and the bottom plate is connected between middle plate by positioning pin, and the middle plate is connected between top plate by pillar;Multiple pressing blocks for fixing chip are opened in top plate, and pressing block includes countersunk cap and pressing rod, and countersunk cap diameter is greater than pressing rod diameter, and positioning hole matched with countersunk cap is opened in top plate, and through hole matched with pressing rod is equipped on middle plate, and tool acupoint is equipped on bottom plate with through hole one to one corresponding.The utility model chip is placed in the acupoint of bottom plate, and middle plate and top plate are connected by pillar, and pressing block successively passes through top plate and middle plate, and chip is pressed by the gravity of pressing block itself downwards.