A method of forming via-first, dual damascene interconnect structures by using a gap-filling, bottom anti-reflective 
coating material whose thickness is easily controlled by a 
solvent is provided. After application to a substrate, the bottom anti-reflective 
coating is partially cured by baking at a low temperature. Next, a 
solvent is dispensed over the coated 
wafer and allowed to contact the 
coating for a period of time. The 
solvent removes the bottom anti-reflective coating at a rate controlled by the bottom anti-reflective coating's bake temperature and the solvent 
contact time to yield a bottom anti-reflective coating thickness that is thin, while maintaining optimum light-absorbing properties on the 
dielectric stack. In another possible application of this method, sufficient bottom anti-reflective coating may be removed to only partially fill the vias in order to protect the bottoms of the vias during subsequent 
processing. The solvent is removed from the 
wafer, and the bottom anti-reflective coating is cured completely by a high-temperature bake. The 
wafer is then coated with 
photoresist, and the trench pattern exposed. The bottom anti-reflective coating material used maintains a greater planar 
topography for trench patterning, eliminates the need for an inorganic light-absorbing material layer on the top of the 
dielectric stack, protects the bottom of the vias during the trench etch, and prevents the formation of fencing problems by using a solvent to control the thickness in the vias.