The utility model discloses a
semiconductor double-
station test sorting
machine, which is characterized in that two test devices are arranged on two sides of a feeding and discharging sorting device and are respectively provided with a first
chip transfer
manipulator, so that the same feeding and discharging sorting device can be matched with the two test devices, the parallel double-test-
station design is realized, the test can be carried out at the same time, and the
test efficiency is improved. The
chip testing device is simple in structure and free of mutual interference, the testing efficiency is remarkably improved, more
chip testing can be completed within the same time, the overall testing period is shortened, the equipment
utilization rate is improved, the
unit testing cost is reduced, and the occupied area of field equipment can be effectively reduced due to the fact that the feeding and discharging sorting device is shared. In addition, even if one testing device breaks down, the other testing device can continue to work, and production continuity is guaranteed. In general, the test sorting
machine is high in
automation degree, manual intervention is reduced, the labor cost is reduced, convenience is provided for subsequent production scale expansion and technology upgrading, and the test sorting
machine has remarkable advantages and benefits.