263results about How to "Wide band gap" patented technology

The invention provides an avalanche photodiode based on AlInAsSb body material as the multiplication region, comprising: a substrate; a buffer layer epitaxially on the substrate; an N-type ohmic contact layer epitaxially on the buffer layer and having a cross section of "" Convex" shape, its lower half is consistent with the shape of the substrate, and its upper half is cylindrical; the avalanche multiplication layer is epitaxial on the upper surface of the upper half of the N-type ohmic contact layer, composed of AlxIn1‑xAsySb1‑y Bulk material preparation, the doping concentration is less than 1016cm-3, the value range of x is: 0≤x≤1, the value range of y is: 0.08≤y≤1; the P-type charge layer is epitaxial on the avalanche multiplication layer ; The light absorbing layer is epitaxial on the P-type charge layer; and the P-type ohmic contact layer is epitaxially on the light absorbing layer. The avalanche photodiode has the advantages of low noise and high gain-bandwidth product, and at the same time effectively reduces the dark current, which not only meets the requirement of high sensitivity of the photodetector, but also realizes the design of energy band engineering and broadens its application range.

The invention discloses a ferroelectric thin-film transistor, which comprises a substrate; a bottom gate electrode formed on the substrate; a ferroelectric film layer formed on the bottom gate electrode; a channel layer formed on the ferroelectric film layer; a source electrode formed on the channel layer; and a drain electrode formed on the channel layer and separated from the source electrode. The invention also discloses a preparation method of the ferroelectric thin-film transistor. By introducing a hafnium-oxide-based material and SnO to the transistor to serve as a gate medium material and a channel material of the transistor respectively, the transistor is allowed to be compatible with existing silicon process in the preparation process, and can realize low power consumption; and the ferroelectric thin-film transistor can be widely applied to high-performance and low-power-consumption large-scale storage integrated circuits.

The invention discloses an N-type crystalline silicon solar cell and a preparation method thereof, a photovoltaic module, belonging to the technical field of solar cells. The N-type crystalline silicon solar cell comprises a front electrode, a front passivation layer, an emitter, an N-type crystalline silicon substrate, a back passivation layer and a back electrode, wherein the front passivation layer comprises a gallium oxide layer in direct contact with the emitter. In this solar cell, the P-type silicon surface of the emitter of the N-type crystalline silicon solar cell is chemically passivated and field passivated by the negative charge carried by the gallium oxide layer, reducing the minority carrier recombination rate at the P-type silicon surface, Furthermore, the gallium oxide layer is utilized to reduce the absorption of incident light and improve the photocurrent density of the solar cell, thereby increasing the voltage and current of the solar cell, improving the photoelectric conversion efficiency of the solar cell, further increasing the output power of the photovoltaic module, reducing the power cost and improving the performance-price ratio of the photovoltaic powergeneration.

The invention relates to an oxygen-vacancy tungsten oxide/carbon nitride composite photocatalyst and a preparation method and application thereof. The preparation method of the composite photocatalystcomprises the following steps of: S1, adding carbon nitride powder in a hydrochloric acid solution for protonation treatment, performing continuous stirring, and then conducting filtration, washing and drying; S2, dispersing the protonated carbon nitride powder in anhydrous ethanol or water for ultrasonic treatment, and then adding tungsten hexachloride for a hydrothermal reaction; and S3, collecting the product of the hydrothermal reaction, and performing washing, drying and grinding to obtain the oxygen-vacancy tungsten oxide/carbon nitride composite photocatalyst. According to the oxygen-vacancy tungsten oxide/carbon nitride composite photocatalyst and the preparation method and application thereof, doping treatment is performed on carbon dioxide by adopting oxygen-vacancy WO2.72 as adoping semiconductor, more active sites can be provided by the oxygen-vacancy structure of the tungsten oxide in a photocatalytic reaction, and meanwhile the oxygen-vacancy tungsten oxide/carbon nitride (WO2.72/C3N4) composite material has a larger energy gap and a wider range of response to sunlight.

A novel substance with which an increase in life and emission efficiency of a light-emitting element can be achieved is provided. A carbazole compound having a structure represented by General Formula (G1) is provided. Note that a substituent which makes the HOMO level and the LUMO level of a compound in which a bond of the substituent is substituted with hydrogen deep and shallow, respectively is used as each of substituents in General Formula (G1) (R¹, R², Ar³, and α³). Further, a substituent which makes the band gap (Bg) and the T1 level of a compound in which a bond of the substituent is substituted with hydrogen wide and high is used as each of the substituents in General Formula (G1) (R¹, R², Ar³, and α³).

A first SiO₂ thin film, a tungsten gate electrode, and a second SiO₂ thin film are selectively formed on a first n⁺-type GaN contact semiconductor layer in that order and in a multilayer film structure having the three layers, a stripe-shaped opening is formed. Via the opening, an undoped GaN channel semiconductor layer and the second n⁺-type GaN contact semiconductor layer are formed so that both the layers are regrown by, for example, metal organic chemical vapor deposition. A source electrode and a drain electrode are formed so as to contact the corresponding second and first n⁺-type GaN contact semiconductor layers. The regrown undoped GaN channel semiconductor layer and the regrown second n⁺-type GaN contact semiconductor layer are horizontally grown portions and hence, the contact area of the electrode can be made larger than the area of the opening.

The invention discloses a preparation method of super-hydrophobic self-cleaning glass based on a ZnO nano array coating. The preparation method comprises the following steps: preparing ZnO seed layer sol by a sol-gel method; plating ITO glass with a ZnO seed layer by a dipping-pulling method; performing heat treatment and paving a layer of polystyrene spheres; performing hydrothermal treatment on the prepared ZnO seed layer/PS material in a ZnO growth solution to obtain a ZnO/PS nano rod array; and treating the ZnO/PS nano rod array with toluene for a period of time to obtain the super-hydrophobic self-cleaning glass. According to the super-hydrophobic self-cleaning glass based on a ZnO nano array coating prepared by the method disclosed by the invention, the transmittance of visible light can reach 96.3%, and both of the ultraviolet absorption efficiency and shielding efficiency can reach 90%; and according to the test by a contact angle meter (DSA series), the contact angle to water exceeds 152 degrees. The preparation method disclosed by the invention has the advantages of no secondary harm, low cost, easiness in implementation and convenience in control.

The invention discloses a ferroelectric field-effect transistor, which comprises a substrate; a source electrode region formed on the substrate; a drain electrode region formed on the substrate and separated from the source electrode region; an insulation layer formed on the substrate and between the source electrode region and the drain electrode region; a ferroelectric film layer formed on the insulation layer; a gate electrode formed on the ferroelectric film layer; a source electrode formed on the source electrode region; and a drain electrode formed on the drain electrode region. By introducing a hafnium-oxide-based material to the transistor to serve as a gate medium material of the transistor, and HfN as the insulation layer, the transistor is allowed to be compatible with the existing silicon process in the preparation process, and can realize low power consumption, reduce leakage current and realize long-time retentivity; and the ferroelectric field-effect transistor can be widely applied to high-performance and low-power-consumption large-scale storage integrated circuits.

The invention provides a method for preparing doping type hexagonal system nano ZnS at a low temperature, belonging to the field of semiconductor materials. The method is characterized in that transition metal and rare earth-doped hexagonal system nano ZnS is synthesized by a reversed micelle method at the temperature of less than 100 DEG C, wherein an oil phase is an organic solvent, a water phase is a zinc salt aqueous solution, N,N-dimethylformamide is used as the solvent, a zinc salt is used as an zinc ion source, thiourea serves as a sulphur ion source, and mercaptoacetic acid serves as a surface active agent; and the heating temperature is controlled by an oil bath, and the whole reaction is carried out in the air, and any air isolating measure is not needed. The method is simple tooperate, the required reactions are carried out in a liquid phase, subsequent high-temperature annealing treatment is not needed, and reaction conditions are mild; and the method is energy-saving andenvironment-friendly, and an economically feasible way is provided for producing the hexagonal system nano ZnS with high stability and good water solubility on large scale.

The present invention provides an ultra steep average subthreshold swing nano wire tunneling field effect transistor and a method for preparing the same which belong to the field effect transistor logic device field of the CMOS ultra large scale integration (ULSI). The tunneling field effect transistor adopts a nano wire structure of core-multilayered shell, and the material band gap of a multilayered shell part is increased continuously along the radius direction of the nano wire. According to the present invention, a subthreshold slope degradation phenomenon in a device transfer characteristic can be restrained effectively, at the same time, an average subthreshold slope of the tunneling field effect transistor is reduced remarkably, and a more steep minimum subthreshold slope is kept.

The invention discloses a tunneling field effect transistor and a preparation method, and belongs to the field of a field effect transistor logic device of a CMOS (Complementary Metal Oxide Semiconductor) ultra-large scale integrated circuit (ULSI). A tunneling source region and a channel region of the tunneling field effect transistor are of heterogeneous structures in the vertical direction of the device; the upper layer is made of a semiconductor material with larger forbidden bandwidth; the middle layer is made of a semiconductor material with smaller forbidden bandwidth; the lower layer is a semiconductor substrate with the larger forbidden bandwidth. Compared with the prior art, the transistor and the method have the advantages that the degradation phenomenon of sub-threshold slope in device transfer characteristic can be effectively inhibited, meanwhile the average sub-threshold slope of the tunneling field effect transistor is obviously reduced, and steep minimum sub-threshold slope is kept.

The invention provides an indium phosphide quantum dot with a core-shell structure as well as a preparation method and application thereof. The surface of an indium phosphide quantum dot is coated with a zinc sulfide shell layer doped with heteroatoms to form the indium phosphide quantum dot with the core-shell structure with an indium phosphide quantum dot core and a shell layer comprising compounds such as ZnMnS, ZnMgS or ZnSeS, so that the lattice mismatch degree of the quantum dot at a core-shell interface is appropriate, a forbidden band width is wider; at an excitation state, excitons generated at the core of the quantum dot obtained by the method are completely limited to the core and are difficult to migrate to the surface of the quantum dot, and the non-radiation recombination occurs at the surface defect state, thereby remarkably improving the quantum yield of the quantum dots; and the quantum yield of the quantum dot obtained by the method reaches up to 93 percent, an emission peak position is adjustable in a visible light range, and the application potential as a substitute product of traditional semiconductor quantum dot is high.

The invention relates to a composite photocatalysis system, and a preparation method and application thereof. The composite photocatalysis system is Er<3+>: YeAl5O12/(MoS2/NiGa2O4)-(BiVO4/PdS). The preparation method comprises the following steps: synthesizing nanometer particles of an up-conversion luminescence agent Er<3+>: YeAl5O12 by using a sol-gel method; then synthesizing NiGa2O4 and BiVO4 by using a hydrothermal method and preparing Er<3+>: YeAl5O12/NiGa2O4-BiVO4; and loading a conduction band cocatalyst MoS2 and a valence band cocatalyst PdS so as to obtain the composite photocatalysis system. The novel composite photocatalysis system designed in the invention has strong oxidation-reduction performance; and the novel composite photocatalysis system uses pollutants as resources and produces hydrogen energy during removal of pollutants, so the dual purposes of environment treatment and production of clean energy are achieved.

The invention discloses a preparation method for functional wood capable of degrading organic pollutants through photocatalysis. The preparation method comprises the following steps that wood is subjected to pretreatment, internal pores of the wood are gotten through, and hydroxyl on the surface of the wood is exposed; bismuth nitrate is taken to be dissolved in an acid solution, then, coupling agents are added, stirring is conducted, and a mixed solution is obtained; soluble iodized salts and soluble chlorate are taken to be dissolved in water, stirring is conducted for dissolving, and a halide salt solution is obtained; the pretreated wood is soaked into the mixture solution, subjected to pressurized soaking, taken out and dewatered, and the wood adsorbed with bismuth ions is obtained; the wood adsorbed with the bismuth ions is soaked into the halide salt solution, subjected to pressurized soaking, taken out and subjected to vacuum drying, and then the functional wood capable of degrading the organic pollutants through photocatalysis can be obtained. The functional wood prepared through the method is high in light use ratio, can effectively degrade the organic pollutants under visible light radiation and is good in degradation effect.

The invention provides a perovskite single crystal rapid growth method with an adjustable forbidden band width. The forbidden band width of a perovskite material is regulated and controlled by regulating and controlling the proportion of raw material halogen. Halogen-mixed perovskite powder is obtained through synthesis and dissolved in an organic solvent, polyethylene glycol, polypropylene glycol, polyvinyl alcohol or polyacrylic acid is added, and the halogen-mixed perovskite single crystal with the adjustable forbidden band width is grown through low-temperature heating. The synthesized iodine/bromine and bromine/chlorine arbitrarily-proportioned mixed lead-based methylamine perovskite single crystal is large in size, regular in shape and good in crystallinity. According to the method,the unit valence of the lead-based methylamine halogen perovskite can be randomly regulated and controlled, and the forbidden band width is randomly regulated and controlled from 1.51 eV to 2.94 eV. An experimental device is simple and low in cost, the process is simple and reliable, and the obtained single crystal has good crystallinity. And the variety of perovskite single crystal materials is broadened. And a new material basis is provided for searching perovskite materials with more excellent performance in the fields of photoelectric detectors and light-emitting devices.

The invention belongs to the technical field of photopurifying agents and discloses a neutral formaldehyde photopurifying agent and a preparation method thereof. The preparation method disclosed by the invention comprises the following steps: S1, calcining dicyandiamide under 500 to 650 DEG C to obtain graphite-phase carbon nitride; S2, grinding the graphite-phase carbon nitride into powder and calcining again under 400 to 550 DEG C in the air atmosphere to obtain carbon nitride; S3, dispersing carbon nitride into water to obtain the neutral formaldehyde photopurifying agent. The preparation method disclosed by the invention has the advantage of simpleness in operation; the prepared formaldehyde photopurifying agent has the advantages of high activity, larger specific surface area (170.2 m<2>/g), ability in providing more reaction sites, stronger absorption to 200 to 1100nm waveband light and stronger photocatalytic degradation purifying ability under visible light irradiation; when being applied to photocatalytic degradation of formaldehyde gas, 61% of formaldehyde can be degraded within 16 hours; furthermore, neutral water is utilized as a dispersing agent, so that more safety inuse is achieved, and dispersity is stable and durable.

The invention discloses a CuAlO2/Ga2O3 ultraviolet photodiode, comprising a top electrode and a bottom electrode, wherein a P-type crystal CuAlO2 film, an I-type beta-Ga2O3 film, and an N-type singlecrystal beta-Ga2O3 substrate are sequentially disposed between the two electrodes from the top electrode to the bottom electrode. The invention also discloses a preparation method of a CuAlO2/Ga2O3 ultraviolet photoelectric diode. The invention solves the problem that the Ga2O3-based PIN ultraviolet photoelectric diode cannot be prepared due to the shortage of p-type Ga2O3 material in the prior art.

The invention discloses an LED epitaxial growth method used for improving the internal quantum efficiency. The method sequentially comprises the steps of substrate processing, low-temperature buffer layer GaN growing, undoped GaN layer growing, Si-doped N-type GaN layer growing, AlGaN:Zn thin barrier layer growing, alternate InxGa(1-X)N/GaN light emitting layer growing, P-type AlGaN layer growing, Mg-doped P-type GaN layer growing, and cooling. The AlGaN:Zn thin barrier layer grows on one side, which is close to an N-type layer, of a light emitting layer to form an asymmetric well barrier structure to suppress the generation of electron leakage current. The injection efficiency of electrons and holes in a quantum well is improved. The internal quantum efficiency and the optical power of an LED are improved. The light emitting efficiency of the LED is enhanced.

The invention relates to an arsenic gallium enhancement/depletion strain high electron mobility transistor structure, wherein it uses indium gallium arsenic/indium aluminum arsenic/indium gallium arsenic material; on the semi-insulated arsenic gallium substrate, it uses slow-change growing technique to grow linear slow-change indium aluminum gallium arsenic extending layer as the buffer layer; then growing indium aluminum arsenic layer, indium gallium arsenic layer, indium aluminum arsenic layer, plane doping layer, indium aluminum arsenic layer, indium phosphor layer, indium aluminum arsenic layer, and indium gallium arsenic layer; the groove two-dimension electron density is 1.57E+12cm-2, the electron mobility is 9790cm2/V.S, with better repeat property and high reliability.

The invention relates to a fin type FET and a formation method thereof. The formation method comprises that a semiconductor substrate is provided; a fin portion is formed on the semiconductor substrate; a carbon-contained semiconductor layer is formed at the surface of the fin portion and the semiconductor substrate; a graphene layer is formed at the surface of the carbon-contained semiconductor layer; the surface of the graphene layer is restored to eliminate defects of the graphene layer; an isolation layer is formed on part of the graphene layer, and the surface of the isolation layer is lower than the top surface of the fin portion; and a grid structure across the fin portion is formed at the surface of the graphene layer, and the grid structure covers the part, placed at the top and the sidewalls of the fin portion, of the graphene layer. The method can improve the performance of the fin type FET.

The invention provides a high dielectric constant thin film-aluminum oxide laminated structure insulating film and a preparation method thereof. High dielectric constant material gel and aluminum oxide gel are prepared by a sol-gel method respectively; through a spin-coating technology, a high dielectric constant thin film and an aluminum oxide film are successively formed on a base; and the spin-coating process is repeated to prepare a plurality of high dielectric constant thin film-aluminum oxide laminated structure insulating films. According to the high dielectric constant thin film-aluminum oxide laminated structure insulating film, Al2O3 has a relatively large forbidden band gap; by the laminated structure, doping of high-dielectric and wide-band gap materials is achieved; the Al2O3 layer plays a role in preventing a current carrier from transmitting to another layer of high dielectric constant thin film from one layer of high dielectric constant thin film, so as to suppress leakage current; in the laminated structure, the heat stability of each high dielectric constant thin film can also be improved by the Al2O3; and the problems such as deflect accumulation and leakage channels caused by insulating layer crystallization are effectively reduced. The high dielectric constant thin film-aluminum oxide laminate structure insulating film is simple in preparation method, cheap in equipment, low in cost and beneficial to large-scale production.