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15 results about "E-Material" patented technology

E-Material, also called E Material, is a metal matrix composite consisting of beryllium matrix with beryllium oxide particles. It has high thermal conductivity (210-230 W/m K), and its thermal expansion can be adjusted to match other materials, e.g. silicon and gallium arsenide chips and various ceramics. It is chiefly used in microelectronics as substrate for power semiconductor devices and high density multi-chip modules, where it aids with removal of waste heat. E-materials have low weight and high strength, making them especially suitable for aerospace technology. Their high elastic modulus is favorable for absorbing vibrations and lowering material fatigue of attached modules and wire bonds.

Nitrogenating of Topological Semi-Metal Films to Increase Resistivity

The present disclosure generally relates to spintronic material stacks and devices. A spintronic stack comprises an amorphous layer, a texturing layer comprising one or more materials selected from the group consisting of: TaxW1-x, where x is from zero to 1, MgO, Ru, Ti, TiN, YPt, B2 alloys X—Al, where X is one of Co, Ni, Ru, Rh, or Ir, CrMo, TaxW1-x N, HfN, and TaxHf1-xN, a barrier layer comprising one or more materials selected from the group consisting of: X—AlGe, X—AlGeN, where X is one of Co, Ni, Ru, or Ir, TaxW1-xN, HfN, and TaxHf1-xN, and TiN, a YPtBi layer having a (110), (111), or (100) orientation, an interlayer, and a ferromagnetic layer. The texturing barrier layers each individually comprises a material having a high resistivity to minimize shunting, and function as a crystal symmetry transfer layer to provide the a (110), (111), or (100) orientation to the YPtBi layer.
Owner:WESTERN DIGITAL TECHNOLOGIES INC

Nickel-sulfur anode and preparation method thereof

The invention relates to the field of microelectronic material manufacturing, in particular to a nickel-sulfur anode and a preparation method thereof. The method comprises the steps that a high-purity nickel plate with the purity larger than or equal to 4N5 and a nickel-sulfur intermediate alloy are used as raw materials for burdening and smelting, a nickel-sulfur anode cast ingot is obtained, and the mass content of sulfur in the nickel-sulfur anode cast ingot is 5-15 ppm; and then the nickel-sulfur anode cast ingot is subjected to hot forging at the heat preservation temperature of 500-1000 DEG C, and the blank obtained after hot forging is subjected to annealing treatment at the annealing temperature of 300-600 DEG C. According to the invention, a short-flow processing technology is adopted, the difficulty that the material is high in brittleness and easy to crack is overcome, the content of S in the nickel-sulfur anode is 10 + / -5ppm, the purity of the nickel-sulfur anode is up to 99.995% or above, and the coating purity is high; the organization structure is compact and free of pores, grains are fine and uniform, the grain size is smaller than or equal to 150 microns, and the coating uniformity is good; the coating efficiency is high, and the coating film can be widely applied to the industries of electronic components, communication, solar photovoltaic photoelectricity and the like.
Owner:GRIKIN ADVANCED MATERIALS

Nitrogenating of topological semi-metal films to increase resistivity

The present disclosure generally relates to spintronic material stacks and devices. A spintronic stack comprises an amorphous layer, a texturing layer comprising one or more materials selected from the group consisting of: TaxWi-x, where x is from zero to 1, MgO, Ru, Ti, TiN, YPt, B2 alloys X-AI, where X is one of Co, Ni, Ru, or Ir, CrMo, TaxWi-x N, HfN, and TaxHfi-xN, a barrier layer comprising one or more materials selected from the group consisting of: X-AIGe, X-AIGeN, where X is one of Co, Ni, Ru, or Ir, TaxWi-xN, HfN, and TaxHfi-xN, and TiN, a YPtBi layer having a (110), (111), or (100) orientation, an interlayer, and a ferromagnetic layer. The texturing barrier layers each individually comprises a material having a high resistivity to minimize shunting, and function as a crystal symmetry transfer layer to provide the a (110), (111), or (100) orientation to the YPtBi layer.
Owner:WESTERN DIGITAL TECHNOLOGIES INC

Micro-LED repairing and bonding method based on viscoelastic conductive photoresist

PendingCN121692889ALED displayHigh density
The invention belongs to the technical field of microelectronic materials, and discloses a Micro-LED repairing and bonding method based on viscoelastic conductive photoresist. According to the method, a conductive photoresist pattern containing conductive nanoparticles, a photoresist matrix, a photosensitive gasified polymer and a viscoelastic polymer is prepared, a repair structure is pushed to be transferred to a bonding pad defect position by utilizing specific wavelength laser to trigger gasification decomposition, and a Micro-LED chip is temporarily fixed by virtue of viscoelasticity; and finally, the permanent bonding of the high-conductivity bonding pad and the chip is formed by heating and curing, so that the industrial pain points of difficulty in repairing the damage of the bonding pad, low precision, poor conductivity and the like in the mass transfer of the Micro-LED are solved. The system integrates a laser repairing module, a positioning calibration module and a thermocuring module, can efficiently repair defects of a driving substrate of a high-density Micro-LED display, remarkably improves the yield and reliability, and is suitable for manufacturing and maintaining Micro-LED displays such as vehicle-mounted displays, wearable equipment and outdoor large-screen displays.
Owner:FUZHOU UNIV +1

Highly Textured Buffer Layer to Grow YBiPt (110) For Spintronic Applications

The present disclosure generally relates to spintronic material stacks and devices. The various disclosed embodiments of YBiPt based spin orbit torque (SOT) stacks can be used for high temperature applications. Disclosed herein are various buffer and / or interlayer configurations in spintronic stacks that can promote growth of YBiPt in the (110) orientation, to promote a high spin Hall angle (SHA) in SOT applications. One embodiment is a spintronic stack comprising a buffer layer comprising one or more layers, the one or more layers each individually comprising: MgO(100), TiN(100), Ta, Nb, HfN, Ta3W2 (110), TaW2 (100), Ta3W2N, TaW2N, or heated YPt, an SOT layer comprising YBiPt in the (110) orientation, an interlayer comprising one or more of MgO, Ta3WN, TaW3N, Ta3W (110), TaW3 (100), YPt (110), NiFeGeN, NiAlN, NiAl, NiFeGe, NiAlGe, or HfN, and a ferromagnetic layer.
Owner:WESTERN DIGITAL TECHNOLOGIES INC

Application of hafnium oxide-based memristor in preparation of electronic switch

PendingCN122121548AIndiumElectronic switch
The application provides application of hafnium oxide-based memristor in preparation of electronic switches and belongs to the technical field of microelectronic materials and devices. The hafnium oxide-based memristor used in preparation of the electronic switches has a bidirectional threshold characteristic, and the structure thereof comprises, from bottom to top, an inert bottom electrode, an intermediate layer, a buffer layer and an active top electrode. The intermediate layer is a hafnium oxide film subjected to plasma treatment and annealing double treatment, the buffer layer is a silver indium antimony tellurium film, and the active top electrode is a silver electrode. The memristor can be converted from a high resistance state to a low resistance state at a threshold voltage under positive and negative voltages, and can spontaneously recover to the high resistance state when back scanning to a holding voltage. The hafnium oxide-based memristor is used in preparation of the electronic switches, the double treatment process and the AIST buffer layer complement each other, and the hafnium oxide-based memristor is endowed with comprehensive performance, so that the application requirements of high-performance and low-power-consumption electronic switches can be fully met, and the practical development of the technology is promoted.
Owner:NORTHEAST NORMAL UNIVERSITY

Tin-silver anode and preparation method thereof

The invention relates to the technical field of metal material processing and microelectronic material manufacturing, in particular to a tin-silver anode and a preparation method thereof. The method comprises the following steps: proportioning: proportioning high-purity tin and high-purity silver serving as raw materials to obtain a material; the mass ratio of the high-purity tin to the high-purity silver is 98: 2-92: 8; smelting: smelting the materials to obtain a tin-silver anode cast ingot; and cold deformation: carrying out cold deformation on the tin-silver anode cast ingot. According to the invention, a short-process processing technology is adopted, and more excellent performance and economic benefits are taken into account. The tin-silver anode with uniform components is designed and prepared, has conductivity and ductility, is more excellent in performance, gives consideration to economic benefits, and can be widely applied to the industries of electronic components, communication, solar photovoltaic photoelectricity and the like.
Owner:GRIKIN ADVANCED MATERIALS

High Resistivity Buffers and Interlayers to Promote BiSb (012) and (001) and Minimized Shunting

The present disclosure generally relates to spintronic material stacks and devices. A spintronic stack comprises an amorphous layer, a texturing layer comprising one or more materials selected from the group consisting of: TaxW1-x, MgO, YPt, RuAl, RuAlN, HfN, NiAlGeN, IrAlGeN, and (TaxW1-x)N, and TiN, where x between 0.005 and 1, a barrier layer comprising one or more materials selected from the group consisting of: NiAlGeN, NiAlGe, IrAlGeN, IrAlGe, HfN, and TiN, a topological insulating (TI) layer comprising BiSb having a (012) or (001) orientation, an interlayer, and a ferromagnetic layer. The texturing layer, the barrier layer, and the interlayer each individually comprises a material having a high resistivity to minimize shunting, act as a migration barrier, and function as a crystal symmetry transfer layer to provide the (012) or (001) orientation to the TI layer. The spintronic stack may be nitrogenated to increase the resistivity of the stack.
Owner:WESTERN DIGITAL TECHNOLOGIES INC

Black-phase CsSnI3 perovskite thin film with high stability as well as preparation method and application of black-phase CsSnI3 perovskite thin film

PendingCN121793615APhysical chemistryAmmonium iodide
The invention belongs to the technical field of perovskite optoelectronic materials, and discloses a black-phase CsSnI3 perovskite thin film with high stability and a preparation method and application thereof. The method comprises the following steps: in a protective atmosphere, coating a substrate with a precursor solution containing CsI, SnI2 and dimethylammonium iodide, and carrying out thermal annealing treatment to obtain a black-phase CsSnI3 perovskite thin film; the thermal annealing treatment conditions are as follows: the temperature is 150-210 DEG C, and the time is 0.5-2 minutes; the molar ratio of CsI to SnI to dimethylammonium iodide is 1: 1: (1-1.6). According to the method, lattice distortion is reduced, Cs2SnI6 phase filling pinholes are generated, and high stability and low defect of the black-phase CsSnI3 film are achieved. The film can be stabilized in air for more than 7 days, and the problems that black-phase CsSnI3 is poor in stability and uncontrollable in performance are solved. The thin film is used for photoelectric devices.
Owner:SOUTH CHINA UNIV OF TECH

Method for lossless transfer of large-area perovskite oxide film based on PPC supporting layer

The invention relates to the technical field of flexible electronic device preparation, and particularly provides a method for lossless transfer of a large-area perovskite oxide film based on a PPC support layer, and the method comprises the steps: preparing a high-quality flexible perovskite oxide film through employing a water-soluble sacrificial layer strontium aluminate, preparing a PPC solution, and carrying out the spin coating of a flat PPC film with the thickness of 1-3 [mu] m through a spin coater, an acetone / ethanol solution is used for cleaning the PPC supporting layer, and the crystal structure and the physical property of the thin film are not damaged after transferring. The size of the oxide thin film transferred by the method reaches the millimeter level, the thin film keeps excellent single crystal characteristics, an atomic level flat surface and good ferroelectric performance, and the oxide thin film can be used as a flexible electronic material.
Owner:INST OF METAL RESEARCH - CHINESE ACAD OF SCI

A method for preparing a fluorinated polymer dielectric-based organic field effect transistor

ActiveCN116234326BPhotovoltaic energy generationOrganic filmOrganic field-effect transistor
The application discloses a preparation method of an organic field effect transistor based on fluorinated polymer dielectric, and belongs to the technical field of microelectronic materials and devices. The preparation method comprises the following steps: firstly, forming source and drain electrodes by evaporation above a substrate; then forming a semiconductor layer and a dielectric layer above the source and drain electrodes by spin coating; and finally, forming a gate electrode above the dielectric layer by evaporation. In the application, DPPT-TT is selected as the semiconductor layer, and CYTOP is selected as the dielectric layer. The optimal annealing temperature of the CYTOP dielectric layer can generate the maximum number of dipoles at the interface between the dielectric layer and the semiconductor layer, so that the organic transistor device with the optimal electrical performance is obtained. The preparation method of the high-performance organic field effect transistor based on fluorinated polymer dielectric provided by the application can optimize the mobility, threshold voltage and on-off ratio of the organic thin film transistor by confirming the optimal annealing temperature of the dielectric layer under the condition of ensuring the optimal working state of the device.
Owner:NANJING UNIV OF POSTS & TELECOMM

Colloidal Silica

The present invention provides colloidal silica that, when used as an abrasive for polishing electronic materials such as semiconductor wafers, exhibits a high degree of suppression of metal contamination on the polished surface, and can form a polished surface with excellent flatness while demonstrating a superior polishing speed. [Solution] The colloidal silica contains silica particles in which the total content of Na, K, Fe, Al, Ca, Mg, Ti, Ni, Cr, Cu, Zn, Pb, Ag, Mn, and Co is less than 100 ppb by mass, the zinc content is less than 1 ppb by mass, and the ratio of the peak intensity derived from the four-membered ring structure of silica to the peak intensity derived from the asymmetric stretching vibration of the siloxane bond of silica, as evaluated by Raman spectroscopy, is 3.50 or less, and the content of coarse particles with a particle size of 0.2 μm or more is 10,000,000 particles / mL or less when the silica particle concentration is 1% by mass.
Owner:FUSO CHEM

Waveguide coupling photoelectric detector and preparation method and application thereof

The invention belongs to the technical field of optoelectronic materials and devices, and particularly relates to a waveguide coupling photoelectric detector and a preparation method and application thereof. The waveguide coupling photoelectric detector comprises a substrate layer, a buffer layer, a Ge1-xSnx absorption layer, a second passivation layer and a second electrode. The base layer comprises a substrate layer, an optical waveguide layer, a first passivation layer and a first electrode, the substrate layer, the optical waveguide layer and the first passivation layer are stacked from bottom to top, two electrode holes are formed in the top of the first passivation layer, the first electrode is arranged above the first passivation layer, and the second electrode is arranged above the second passivation layer. The number of the first electrodes is two, and the two first electrodes are electrically connected with the optical waveguide layer through two electrode holes in the top of the first passivation layer respectively. The waveguide coupling photoelectric detector has the advantages of being compact in structure, wide in wavelength coverage range and high in process compatibility, and can be widely applied to silicon-based near-infrared to mid-infrared photon integrated systems.
Owner:INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI

High resistivity buffers and interlayers to promote bisb (012) and (001) and minimized shunting

The present disclosure generally relates to spintronic material stacks and devices. A spintronic stack comprises an amorphous layer, a texturing layer comprising one or more materials selected from the group consisting of: TaxW1-x, MgO, YPt, RuAI, RuAIN, HfN, NiAIGeN, IrAIGeN, and (TaxW1-x)N, and TiN, where x between 0.005 and 1, a barrier layer comprising one or more materials selected from the group consisting of: NiAIGeN, NiAIGe, IrAIGeN, IrAIGe, HfN, and TiN, a topological insulating (Tl) layer comprising BiSb having a (012) or (001 ) orientation, an interlayer, and a ferromagnetic layer. The texturing layer, the barrier layer, and the interlayer each individually comprises a material having a high resistivity to minimize shunting, act as a migration barrier, and function as a crystal symmetry transfer layer to provide the (012) or (001) orientation to the Tl layer. The spintronic stack may be nitrogenated to increase the resistivity of the stack.
Owner:WESTERN DIGITAL TECHNOLOGIES INC

Double-ferrite heterogeneous co-fired composite substrate material and preparation method thereof

The invention belongs to the field of microwave devices and electronic materials, and discloses a double-ferrite heterogeneous co-fired composite substrate material and a preparation method thereof.The double-ferrite heterogeneous co-fired composite substrate material comprises central ferrite and external nested ferrite, the central ferrite is NiZn ferrite substituted by Cu < 2 + > ions, and the external nested ferrite is NiZn ferrite substituted by Cu < 2 + > ions. The central ferrite is YIG microwave ferrite, the external nested ferrite is YIG microwave ferrite substituted by Bi < 3 + > ions, the central ferrite and the external nested ferrite are compounded through co-firing, and the sintering temperature adopted for co-firing is 1100-1150 DEG C. According to the preparation method, Cu < 2 + > ions are introduced into the NiZn ferrite to generate partial substitution, so that co-firing matching of two heterogeneous ferrite materials, namely the NiZn ferrite and the YIG microwave ferrite, which are relatively large in sintering temperature difference and unmatched in shrinkage characteristics is successfully realized, and the NiZn-YIG ferrite co-fired composite substrate of which the outer ring is not cracked and even is relatively high in bonding quality is obtained; and the method has great potential application value in the field of broadband miniaturization of circulators.
Owner:HUAZHONG UNIV OF SCI & TECH +1